Merge "ARM: dts: msm: Add EP-PCIe PHY settings for sdxbaagha"

This commit is contained in:
qctecmdr
2022-11-21 02:21:33 -08:00
committed by Gerrit - the friendly Code Review server

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@@ -618,7 +618,7 @@
qcom,pcie-vendor-id = /bits/ 16 <0x17cb>;
qcom,pcie-device-id = /bits/ 16 <0x011a>;
qcom,pcie-link-speed = <1>;
qcom,pcie-phy-ver = <7>;
qcom,pcie-phy-ver = <8>;
qcom,pcie-active-config;
qcom,pcie-aggregated-irq;
qcom,pcie-mhi-a7-irq;
@@ -626,6 +626,76 @@
qcom,mhi-soc-reset-offset = <0xb001b8>;
qcom,aoss-rst-clr;
qcom,aux-clk = <0x13>;
qcom,phy-init = <0x0240 0x01 0x0
0x0094 0x00 0x0
0x0154 0x31 0x0
0x016c 0x08 0x0
0x0058 0x0f 0x0
0x00a4 0x42 0x0
0x0110 0x24 0x0
0x011c 0x03 0x0
0x0118 0xb4 0x0
0x010c 0x02 0x0
0x01bc 0x11 0x0
0x00bc 0x19 0x0
0x00b0 0x04 0x0
0x00ac 0xff 0x0
0x00c4 0x14 0x0
0x00b8 0x09 0x0
0x00b4 0xff 0x0
0x0158 0x01 0x0
0x0074 0x20 0x0
0x007c 0x13 0x0
0x0084 0x00 0x0
0x0078 0x12 0x0
0x0080 0x12 0x0
0x0088 0x00 0x0
0x01b0 0x1d 0x0
0x01ac 0x56 0x0
0x01b8 0x17 0x0
0x01b4 0x78 0x0
0x004c 0x07 0x0
0x0050 0x07 0x0
0x00f0 0x01 0x0
0x00ec 0xfb 0x0
0x00f8 0x01 0x0
0x00f4 0xfb 0x0
0x000c 0x02 0x0
0x01a0 0x14 0x0
0x0ee4 0x20 0x0
0x0e84 0x75 0x0
0x0e90 0x3f 0x0
0x115c 0x7f 0x0
0x1160 0xff 0x0
0x1164 0xbf 0x0
0x1168 0x3f 0x0
0x116c 0xd8 0x0
0x1170 0xdc 0x0
0x1174 0xdc 0x0
0x1178 0x5c 0x0
0x117c 0x34 0x0
0x1180 0xa6 0x0
0x1190 0x34 0x0
0x1194 0x38 0x0
0x10d8 0x0f 0x0
0x0e3c 0x12 0x0
0x0e40 0x01 0x0
0x10dc 0x00 0x0
0x104c 0x08 0x0
0x1050 0x08 0x0
0x1044 0xf0 0x0
0x11a4 0x38 0x0
0x10cc 0xf0 0x0
0x10f4 0x07 0x0
0x1008 0x09 0x0
0x1014 0x05 0x0
0x0654 0x00 0x0
0x06a8 0x0f 0x0
0x0388 0x77 0x0
0x0398 0x0b 0x0
0x02dc 0x0d 0x0
0x0200 0x00 0x0
0x0244 0x03 0x0>;
status = "disabled";
};