Evolution-x-devices/kernel_oneplus_sm8550-devicetrees
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Merge "ARM: dts: msm: Remove NFC dtsi entries for khaje"

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qctecmdr
2022-08-29 05:48:28 -07:00
committed by Gerrit - the friendly Code Review server
parent 04d8a39816 a3af42d55f
commit 83cb3335d8
3 changed files with 0 additions and 76 deletions
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22
qcom/khaje-idp.dtsi
View File

@@ -159,28 +159,6 @@
};
};
&qupv3_se1_i2c {
status = "ok";
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,nq-nci";
reg = <0x28>;
qcom,nq-irq = <&tlmm 70 0x00>;
qcom,nq-ven = <&tlmm 69 0x00>;
qcom,nq-firm = <&tlmm 31 0x00>;
qcom,nq-clkreq = <&tlmm 71 0x00>;
interrupt-parent = <&tlmm>;
interrupts = <70 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active
&nfc_clk_req_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend
&nfc_clk_req_suspend>;
};
};
&sdhc_1 {
vdd-supply = <&L24A>;
qcom,vdd-voltage-level = <2960000 2960000>;

32
qcom/khaje-pinctrl.dtsi
View File

@@ -61,38 +61,6 @@
};
};
nfc {
nfc_clk_req_active {
/* active state */
mux {
/* GPIO 71: NFC CLOCK REQUEST */
pins = "gpio71";
function = "gpio";
};
config {
pins = "gpio71";
drive-strength = <2>; /* 2 MA */
bias-pull-up;
};
};
nfc_clk_req_suspend {
/* sleep state */
mux {
/* GPIO 71: NFC CLOCK REQUEST */
pins = "gpio71";
function = "gpio";
};
config {
pins = "gpio71";
drive-strength = <2>; /* 2 MA */
bias-disable;
};
};
};
pmx_ts_reset_active {
ts_reset_active: ts_reset_active {
mux {

22
qcom/khaje-qrd.dtsi
View File

@@ -105,28 +105,6 @@
};
};
&qupv3_se1_i2c {
status = "ok";
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,nq-nci";
reg = <0x28>;
qcom,nq-irq = <&tlmm 70 0x00>;
qcom,nq-ven = <&tlmm 69 0x00>;
qcom,nq-firm = <&tlmm 31 0x00>;
qcom,nq-clkreq = <&tlmm 71 0x00>;
interrupt-parent = <&tlmm>;
interrupts = <70 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active
&nfc_clk_req_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend
&nfc_clk_req_suspend>;
};
};
&sdhc_1 {
vdd-supply = <&L24A>;
qcom,vdd-voltage-level = <2960000 2960000>;