Merge "ARM: dts: msm: Enable PCIe0 and PCIe1 on RUMI for sdxpinn"

This commit is contained in:
qctecmdr
2022-08-12 02:56:51 -07:00
committed by Gerrit - the friendly Code Review server
3 changed files with 11 additions and 11 deletions

View File

@@ -48,8 +48,8 @@
gdsc-core-vdd-supply = <&gcc_pcie_gdsc>;
gdsc-phy-vdd-supply = <&gcc_pcie_phy_gdsc>;
vreg-1p2-supply = <&pmx75_l1>;
vreg-0p9-supply = <&pmx75_l4>;
vreg-1p2-supply = <&L1B>;
vreg-0p9-supply = <&L4B>;
vreg-cx-supply = <&VDD_CX_LEVEL>;
vreg-mx-supply = <&VDD_MXA_LEVEL>;
@@ -188,8 +188,8 @@
gdsc-core-vdd-supply = <&gcc_pcie_1_gdsc>;
gdsc-phy-vdd-supply = <&gcc_pcie_1_phy_gdsc>;
vreg-1p2-supply = <&pmx75_l1>;
vreg-0p9-supply = <&pmx75_l4>;
vreg-1p2-supply = <&L1B>;
vreg-0p9-supply = <&L4B>;
vreg-cx-supply = <&VDD_CX_LEVEL>;
vreg-mx-supply = <&VDD_MXA_LEVEL>;
@@ -324,8 +324,8 @@
gdsc-core-vdd-supply = <&gcc_pcie_2_gdsc>;
gdsc-phy-vdd-supply = <&gcc_pcie_2_phy_gdsc>;
vreg-1p2-supply = <&pmx75_l1>;
vreg-0p9-supply = <&pmx75_l4>;
vreg-1p2-supply = <&L1B>;
vreg-0p9-supply = <&L4B>;
vreg-cx-supply = <&VDD_CX_LEVEL>;
vreg-mx-supply = <&VDD_MXA_LEVEL>;

View File

@@ -57,7 +57,7 @@
pcie0_clkreq_default: pcie0_clkreq_default {
mux {
pins = "gpio43";
function = "pcie0_clkreqn";
function = "pcie0_clkreq_n";
};
config {
@@ -111,7 +111,7 @@
pcie1_clkreq_default: pcie1_clkreq_default {
mux {
pins = "gpio124";
function = "pcie1_clkreqn";
function = "pcie1_clkreq_n";
};
config {
@@ -165,7 +165,7 @@
pcie2_clkreq_default: pcie2_clkreq_default {
mux {
pins = "gpio121";
function = "pcie2_clkreqn";
function = "pcie2_clkreq_n";
};
config {

View File

@@ -8,7 +8,7 @@
&soc {
pcie0: qcom,pcie@1bf0000 {
status = "disabled";
status = "ok";
reg = <0x01bf0000 0x4000>,
<0x01bf7000 0x2000>,
<0x48000000 0xf20>,
@@ -27,7 +27,7 @@
};
pcie1: qcom,pcie@1c08000 {
status = "disabled";
status = "ok";
reg = <0x01c08000 0x4000>,
<0x01c0e000 0x2000>,
<0x68000000 0xf1d>,