Evolution-x-devices/kernel_oneplus_sm8550-devicetrees
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Merge "ARM: dts: msm: STMMAC changes for SA8155 LV"

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qctecmdr
2022-03-24 01:00:38 -07:00
committed by Gerrit - the friendly Code Review server
parent a9af1a25f7 ec1c0d2963
commit 854c80d73d
2 changed files with 78 additions and 0 deletions
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4
qcom/sa8155-v2.dtsi
View File

@@ -6,3 +6,7 @@
qcom,msm-name = "SA8155 V2";
qcom,msm-id = <362 0x20000>;
};
&ethqos_hw {
emac-core-version = <0x20010002>;
};

74
qcom/sa8155.dtsi
View File

@@ -61,6 +61,80 @@
read-only;
ranges;
};
ethqos_hw: qcom,ethernet@00020000 {
compatible = "qcom,stmmac-ethqos";
qcom,arm-smmu;
reg = <0x20000 0x10000>,
<0x36000 0x100>,
<0x3D00000 0x300000>;
reg-names = "stmmaceth", "rgmii","tlmm-central-base";
clocks = <&gcc GCC_EMAC_AXI_CLK>,
<&gcc GCC_EMAC_SLV_AHB_CLK>,
<&gcc GCC_EMAC_PTP_CLK>,
<&gcc GCC_EMAC_RGMII_CLK>;
clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
interrupts-extended = <&intc 0 689 4>, <&intc 0 699 4>,
<&tlmm 124 2>;
interrupt-names = "macirq", "eth_lpi",
"phy-intr";
snps,tso;
rx-fifo-depth = <4096>;
tx-fifo-depth = <4096>;
snps,reset-gpios = <&tlmm 79 GPIO_ACTIVE_HIGH>;
qcom,phy-intr-redirect = <&tlmm 124 GPIO_ACTIVE_LOW>;
gdsc_emac-supply = <&emac_gdsc>;
pinctrl-names = "dev-emac-mdc",
"dev-emac-mdio",
"dev-emac-rgmii_txd0_state",
"dev-emac-rgmii_txd1_state",
"dev-emac-rgmii_txd2_state",
"dev-emac-rgmii_txd3_state",
"dev-emac-rgmii_txc_state",
"dev-emac-rgmii_tx_ctl_state",
"dev-emac-rgmii_rxd0_state",
"dev-emac-rgmii_rxd1_state",
"dev-emac-rgmii_rxd2_state",
"dev-emac-rgmii_rxd3_state",
"dev-emac-rgmii_rxc_state",
"dev-emac-rgmii_rx_ctl_state",
"dev-emac-phy_intr",
"dev-emac-phy_reset_state",
"dev-emac_pin_pps_0";
pinctrl-0 = <&emac_mdc>;
pinctrl-1 = <&emac_mdio>;
pinctrl-2 = <&emac_rgmii_txd0>;
pinctrl-3 = <&emac_rgmii_txd1>;
pinctrl-4 = <&emac_rgmii_txd2>;
pinctrl-5 = <&emac_rgmii_txd3>;
pinctrl-6 = <&emac_rgmii_txc>;
pinctrl-7 = <&emac_rgmii_tx_ctl>;
pinctrl-8 = <&emac_rgmii_rxd0>;
pinctrl-9 = <&emac_rgmii_rxd1>;
pinctrl-10 = <&emac_rgmii_rxd2>;
pinctrl-11 = <&emac_rgmii_rxd3>;
pinctrl-12 = <&emac_rgmii_rxc>;
pinctrl-13 = <&emac_rgmii_rx_ctl>;
pinctrl-14 = <&emac_phy_intr>;
pinctrl-15 = <&emac_phy_reset_state>;
pinctrl-16 = <&emac_pin_pps_0>;
snps,reset-delays-us = <0 11000 70000>;
phy-mode = "rgmii";
eth-c22-mdio-probe;
ethqos_emb_smmu: ethqos_emb_smmu {
compatible = "qcom,emac-smmu-embedded";
iommus = <&apps_smmu 0x3C0 0x0>;
qcom,iommu-dma = "fastmap";
qcom,iommu-dma-addr-pool = <0x80000000 0x40000000>;
};
};
};
&gpucc {