ARM: dts: qcom: Add oemvm support to Waipio Kernel Platform

Add oemvm support to Waipio Kernel Platform.

Change-Id: I6ed3b3af097d6f1c84c30195b4551f2175774add
This commit is contained in:
Ashish Bhimanpalliwar
2021-12-15 13:40:17 +05:30
parent 672e26fd43
commit 855c427c2d
11 changed files with 204 additions and 1 deletions

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@@ -114,7 +114,11 @@ ifeq ($(CONFIG_ARCH_QTI_VM), y)
waipio_tuivm-dtb-$(CONFIG_ARCH_QTI_VM) += waipio-vm-mtp.dtb \
waipio-vm-cdp.dtb \
waipio-vm-qrd.dtb \
waipio-vm-rumi.dtb
waipio-vm-rumi.dtb \
waipio-oemvm-cdp.dtb \
waipio-oemvm-mtp.dtb \
waipio-oemvm-qrd.dtb \
waipio-oemvm-rumi.dtb
dtb-y += $(waipio_tuivm-dtb-y)
endif
endif

10
qcom/waipio-oemvm-cdp.dts Normal file
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@@ -0,0 +1,10 @@
/dts-v1/;
#include "waipio-oemvm.dtsi"
#include "waipio-oemvm-cdp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Waipio OEMVM CDP";
compatible = "qcom,waipio-cdp", "qcom,waipio", "qcom,cdp";
qcom,board-id = <0x10001 0>;
};

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@@ -0,0 +1,2 @@
&soc {
};

10
qcom/waipio-oemvm-mtp.dts Normal file
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@@ -0,0 +1,10 @@
/dts-v1/;
#include "waipio-oemvm.dtsi"
#include "waipio-oemvm-mtp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Waipio OEMVM MTP";
compatible = "qcom,waipio-mtp", "qcom,waipio", "qcom,mtp";
qcom,board-id = <0x10008 0>;
};

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@@ -0,0 +1,2 @@
&soc {
};

10
qcom/waipio-oemvm-qrd.dts Normal file
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@@ -0,0 +1,10 @@
/dts-v1/;
#include "waipio-oemvm.dtsi"
#include "waipio-oemvm-qrd.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Waipio OEMVM QRD";
compatible = "qcom,waipio-qrd", "qcom,waipio", "qcom,qrd";
qcom,board-id = <0x1000B 0>;
};

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@@ -0,0 +1,2 @@
&soc {
};

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@@ -0,0 +1,10 @@
/dts-v1/;
#include "waipio-oemvm.dtsi"
#include "waipio-oemvm-rumi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Waipio SVM RUMI";
compatible = "qcom,waipio-rumi", "qcom,waipio", "qcom,rumi";
qcom,board-id = <15 0>;
};

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@@ -0,0 +1,3 @@
&arch_timer {
clock-frequency = <500000>;
};

142
qcom/waipio-oemvm.dtsi Normal file
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@@ -0,0 +1,142 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-waipio.h>
#include <dt-bindings/clock/qcom,rpmh.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
qcom,msm-id = <457 0x10000>;
interrupt-parent = <&vgic>;
chosen {
bootargs = "nokaslr log_buf_len=256K root=/dev/ram rw init=/init console=hvc0 loglevel=8";
};
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
CPU0: cpu@0 {
compatible = "arm,armv8";
reg = <0x0 0x0>;
device_type = "cpu";
enable-method = "psci";
cpu-idle-states = <&CPU_PWR_DWN
&CLUSTER_PWR_DWN>;
};
CPU1: cpu@100 {
compatible = "arm,armv8";
reg = <0x0 0x100>;
device_type = "cpu";
enable-method = "psci";
cpu-idle-states = <&CPU_PWR_DWN
&CLUSTER_PWR_DWN>;
};
};
idle-states {
CPU_PWR_DWN: c4 { /* Using Gold C4 latencies */
compatible = "arm,idle-state";
idle-state-name = "rail-pc";
entry-latency-us = <369>;
exit-latency-us = <1502>;
min-residency-us = <4488>;
arm,psci-suspend-param = <0x40000004>;
local-timer-stop;
};
CLUSTER_PWR_DWN: d4 { /* C4+D4 */
compatible = "arm,idle-state";
idle-state-name = "l3-pc";
entry-latency-us = <584>;
exit-latency-us = <2332>;
min-residency-us = <6118>;
arm,psci-suspend-param = <0x40000044>;
local-timer-stop;
};
};
qcom,vm-config {
compatible = "qcom,vm-1.0";
vm-type = "aarch64-guest";
boot-config = "fdt,unified";
os-type = "linux";
kernel-entry-segment = "kernel";
kernel-entry-offset = <0x0 0x0>;
vendor = "QTI";
image-name = "qcom,oemvm";
qcom,pasid = <0x0 0x22>;
memory {
#address-cells = <0x2>;
#size-cells = <0x0>;
base-address = <0x0 0xbb000000>;
size-min = <0x0 0x5000000>; /* 122 MB */
};
segments {
ramdisk = <2>; /* 8MB */
};
vcpus {
config = "/cpus";
affinity = "static";
affinity-map = <0x5 0x6>;
sched-priority = <0>; /* relative to PVM */
sched-timeslice = <2000>; /* in ms */
};
interrupts {
config = &vgic;
};
vdevices {
generate = "/hypervisor";
rm-rpc {
vdevice-type = "rm-rpc";
generate = "/hypervisor/qcom,resource-mgr";
console-dev;
message-size = <0x000000f0>;
queue-depth = <0x00000008>;
qcom,label = <0x1>;
};
};
};
soc: soc { };
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
vgic: interrupt-controller@17100000 {
compatible = "arm,gic-v3";
interrupt-controller;
#interrupt-cells = <0x3>;
#redistributor-regions = <1>;
redistributor-stride = <0x0 0x40000>;
reg = <0x17100000 0x10000>, /* GICD */
<0x17180000 0x100000>; /* GICR * 8 */
};
arch_timer: timer {
compatible = "arm,armv8-timer";
always-on;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
clock-frequency = <19200000>;
};
};

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@@ -1221,6 +1221,14 @@
memory-region = <&cpusys_vm_mem>;
};
qcom,guestvm_loader@bb000000 {
compatible = "qcom,guestvm-loader";
qcom,pas-id = <34>;
qcom,vmid = <49>;
qcom,firmware-name = "oemvm";
memory-region = <&oem_vm_mem>;
};
tlmm-vm-mem-access {
compatible = "qcom,tlmm-vm-mem-access";
qcom,master;