Evolution-x-devices/kernel_oneplus_sm8550-devicetrees
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ARM: dts: msm: Add pinctrl node for UART

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Add pinctrl node for UART which is missed for SA410M target.

Change-Id: Ie5466ce2e9ae493733106f6ca17d093cd7601034
This commit is contained in:
Aniket Randive
2022-09-30 10:50:45 +05:30
parent 52a738f3f2
commit 8d62d95b6e
2 changed files with 126 additions and 20 deletions
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106
qcom/sa410m-pinctrl.dtsi
View File

@@ -109,6 +109,112 @@
};
};
qupv3_se0_4uart_pins: qupv3_se0_4uart_pins {
qupv3_se0_default_cts: qupv3_se0_default_cts {
mux {
pins = "gpio0";
function = "gpio";
};
config {
pins = "gpio0";
drive-strength = <2>;
bias-disable;
};
};
qupv3_se0_default_rts: qupv3_se0_default_rts {
mux {
pins = "gpio1";
function = "gpio";
};
config {
pins = "gpio1";
drive-strength = <2>;
bias-pull-down;
};
};
qupv3_se0_default_tx: qupv3_se0_default_tx {
mux {
pins = "gpio2";
function = "gpio";
};
config {
pins = "gpio2";
drive-strength = <2>;
bias-pull-up;
};
};
qupv3_se0_default_rx: qupv3_se0_default_rx {
mux {
pins = "gpio3";
function = "gpio";
};
config {
pins = "gpio3";
drive-strength = <2>;
bias-pull-down;
};
};
qupv3_se0_cts: qupv3_se0_cts {
mux {
pins = "gpio0";
function = "qup0_se0_l0";
};
config {
pins = "gpio0";
drive-strength = <2>;
bias-disable;
};
};
qupv3_se0_rts: qupv3_se0_rts {
mux {
pins = "gpio1";
function = "qup0_se0_l1";
};
config {
pins = "gpio1";
drive-strength = <2>;
bias-pull-down;
};
};
qupv3_se0_tx: qupv3_se0_tx {
mux {
pins = "gpio2";
function = "qup0_se0_l2";
};
config {
pins = "gpio2";
drive-strength = <2>;
bias-pull-up;
};
};
qupv3_se0_rx: qupv3_se0_rx {
mux {
pins = "gpio3";
function = "qup0_se0_l3";
};
config {
pins = "gpio3";
drive-strength = <2>;
bias-disable;
};
};
};
qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
qupv3_se1_i2c_sda_active: qupv3_se1_i2c_sda_active {
mux {

40
qcom/sa410m-qupv3.dtsi
View File

@@ -71,8 +71,8 @@
interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&system_noc MASTER_QUP_0 &bimc SLAVE_EBI_CH0>;
<&bimc_noc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&sys_noc MASTER_QUP_0 &bimc_noc SLAVE_EBI_CH0>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se0_i2c_sda_active>, <&qupv3_se0_i2c_scl_active>;
pinctrl-1 = <&qupv3_se0_i2c_sleep>;
@@ -94,8 +94,8 @@
interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&system_noc MASTER_QUP_0 &bimc SLAVE_EBI_CH0>;
<&bimc_noc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&sys_noc MASTER_QUP_0 &bimc_noc SLAVE_EBI_CH0>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se0_spi_mosi_active>, <&qupv3_se0_spi_miso_active>,
<&qupv3_se0_spi_clk_active>, <&qupv3_se0_spi_cs_active>;
@@ -117,8 +117,8 @@
interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&system_noc MASTER_QUP_0 &bimc SLAVE_EBI_CH0>;
<&bimc_noc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&sys_noc MASTER_QUP_0 &bimc_noc SLAVE_EBI_CH0>;
pinctrl-names = "default", "active", "sleep", "shutdown";
pinctrl-0 = <&qupv3_se0_default_cts>, <&qupv3_se0_default_rts>,
<&qupv3_se0_default_tx>, <&qupv3_se0_default_rx>;
@@ -142,8 +142,8 @@
interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&system_noc MASTER_QUP_0 &bimc SLAVE_EBI_CH0>;
<&bimc_noc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&sys_noc MASTER_QUP_0 &bimc_noc SLAVE_EBI_CH0>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se1_i2c_sda_active>, <&qupv3_se1_i2c_scl_active>;
pinctrl-1 = <&qupv3_se1_i2c_sleep>;
@@ -165,8 +165,8 @@
interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&system_noc MASTER_QUP_0 &bimc SLAVE_EBI_CH0>;
<&bimc_noc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&sys_noc MASTER_QUP_0 &bimc_noc SLAVE_EBI_CH0>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se1_spi_mosi_active>, <&qupv3_se1_spi_miso_active>,
<&qupv3_se1_spi_clk_active>, <&qupv3_se1_spi_cs_active>;
@@ -189,8 +189,8 @@
interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&system_noc MASTER_QUP_0 &bimc SLAVE_EBI_CH0>;
<&bimc_noc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&sys_noc MASTER_QUP_0 &bimc_noc SLAVE_EBI_CH0>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se2_i2c_sda_active>, <&qupv3_se2_i2c_scl_active>;
pinctrl-1 = <&qupv3_se2_i2c_sleep>;
@@ -212,8 +212,8 @@
interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&system_noc MASTER_QUP_0 &bimc SLAVE_EBI_CH0>;
<&bimc_noc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&sys_noc MASTER_QUP_0 &bimc_noc SLAVE_EBI_CH0>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se2_spi_mosi_active>, <&qupv3_se2_spi_miso_active>,
<&qupv3_se2_spi_clk_active>, <&qupv3_se2_spi_cs_active>;
@@ -236,8 +236,8 @@
interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&system_noc MASTER_QUP_0 &bimc SLAVE_EBI_CH0>;
<&bimc_noc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&sys_noc MASTER_QUP_0 &bimc_noc SLAVE_EBI_CH0>;
pinctrl-names = "default", "active", "sleep", "shutdown";
pinctrl-0 = <&qupv3_se3_default_cts>, <&qupv3_se3_default_rts>,
<&qupv3_se3_default_tx>, <&qupv3_se3_default_rx>;
@@ -262,8 +262,8 @@
interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&system_noc MASTER_QUP_0 &bimc SLAVE_EBI_CH0>;
<&bimc_noc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&sys_noc MASTER_QUP_0 &bimc_noc SLAVE_EBI_CH0>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se5_i2c_sda_active>, <&qupv3_se5_i2c_scl_active>;
pinctrl-1 = <&qupv3_se5_i2c_sleep>;
@@ -285,8 +285,8 @@
interconnect-names = "qup-core", "qup-config", "qup-memory";
interconnects =
<&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>,
<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&system_noc MASTER_QUP_0 &bimc SLAVE_EBI_CH0>;
<&bimc_noc MASTER_AMPSS_M0 &config_noc SLAVE_QUP_0>,
<&sys_noc MASTER_QUP_0 &bimc_noc SLAVE_EBI_CH0>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se5_spi_mosi_active>, <&qupv3_se5_spi_miso_active>,
<&qupv3_se5_spi_clk_active>, <&qupv3_se5_spi_cs_active>;