mirror of
https://github.com/Evolution-X-Devices/kernel_oneplus_sm8550-devicetrees
synced 2026-02-01 09:49:52 +00:00
ARM: dts: msm: Add trustedvm device tree files for Kalama target
Add the trusted VM device nodes. Only RUMI platform is valid at the moment, other platforms configurations are carried over from Waipio and require gpio and default panel updates. Change-Id: Id41cf4ef19cc61ccac489f114b5d71dee76f573e
This commit is contained in:
Steve Cohen
9
Kbuild
9
Kbuild
@@ -1,8 +1,13 @@
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ifeq ($(CONFIG_ARCH_KALAMA), y)
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dtbo-y += display/kalama-sde.dtbo \
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ifneq ($(CONFIG_ARCH_QTI_VM), y)
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dtbo-$(CONFIG_ARCH_KALAMA) += display/kalama-sde.dtbo \
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display/kalama-sde-display-rumi-overlay.dtbo \
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display/kalama-sde-display-cdp-overlay.dtbo \
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display/kalama-sde-display-mtp-overlay.dtbo
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else
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dtbo-$(CONFIG_ARCH_KALAMA) += display/trustedvm-kalama-sde-display-mtp-overlay.dtbo \
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display/trustedvm-kalama-sde-display-cdp-overlay.dtbo \
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display/trustedvm-kalama-sde-display-rumi-overlay.dtbo \
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display/trustedvm-kalama-sde-display-qrd-overlay.dtbo
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endif
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ifneq ($(CONFIG_ARCH_QTI_VM), y)
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12
display/trustedvm-kalama-sde-display-cdp-overlay.dts
Normal file
12
display/trustedvm-kalama-sde-display-cdp-overlay.dts
Normal file
@@ -0,0 +1,12 @@
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/dts-v1/;
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/plugin/;
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#include "trustedvm-kalama-sde.dtsi"
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#include "trustedvm-kalama-sde-display-cdp.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. Kalama CDP - TrustedVM";
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compatible = "qcom,kalama-cdp", "qcom,kalama", "qcom,cdp";
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qcom,msm-id = <519 0x10000>, <536 0x10000>;
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qcom,board-id = <0x10001 0>;
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};
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137
display/trustedvm-kalama-sde-display-cdp.dtsi
Normal file
137
display/trustedvm-kalama-sde-display-cdp.dtsi
Normal file
@@ -0,0 +1,137 @@
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#include "trustedvm-kalama-sde-display.dtsi"
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&dsi_r66451_amoled_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <255>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_r66451_amoled_video {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <255>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_r66451_amoled_144hz_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <255>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sharp_4k_dsc_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sharp_4k_dsc_video {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sharp_1080_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sharp_qsync_wqhd_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sharp_qsync_wqhd_video {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sharp_qhd_plus_dsc_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_nt35695b_truly_fhd_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sim_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sim_vid {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sim_dsc_375_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sim_dsc_10b_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_dual_sim_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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qcom,bl-dsc-cmd-state = "dsi_lp_mode";
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};
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&dsi_dual_sim_vid {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sim_vdc_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sim_vdc_vid {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_dual_sim_dsc_375_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sim_sec_hd_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <1023>;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&sde_dsi {
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qcom,avdd-regulator-gpio = <&tlmm 64 0>;
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qcom,dsi-default-panel = <&dsi_r66451_amoled_cmd>;
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};
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12
display/trustedvm-kalama-sde-display-mtp-overlay.dts
Normal file
12
display/trustedvm-kalama-sde-display-mtp-overlay.dts
Normal file
@@ -0,0 +1,12 @@
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/dts-v1/;
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/plugin/;
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#include "trustedvm-kalama-sde.dtsi"
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#include "trustedvm-kalama-sde-display-mtp.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. Kalama MTP - TrustedVM";
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compatible = "qcom,kalama-mtp", "qcom,kalama", "qcom,mtp";
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qcom,msm-id = <519 0x10000>, <536 0x10000>;
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qcom,board-id = <0x10008 0>;
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};
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107
display/trustedvm-kalama-sde-display-mtp.dtsi
Normal file
107
display/trustedvm-kalama-sde-display-mtp.dtsi
Normal file
@@ -0,0 +1,107 @@
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#include "trustedvm-kalama-sde-display.dtsi"
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&dsi_r66451_amoled_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <255>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_r66451_amoled_video {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <255>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_r66451_amoled_144hz_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <255>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sharp_4k_dsc_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sharp_4k_dsc_video {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sharp_1080_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sharp_qsync_wqhd_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sharp_qsync_wqhd_video {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sharp_qhd_plus_dsc_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_nt35695b_truly_fhd_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sim_dsc_375_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sim_vdc_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sim_vdc_vid {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_dual_sim_dsc_375_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sim_sec_hd_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <1023>;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&sde_dsi {
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qcom,dsi-default-panel = <&dsi_r66451_amoled_cmd>;
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};
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12
display/trustedvm-kalama-sde-display-qrd-overlay.dts
Normal file
12
display/trustedvm-kalama-sde-display-qrd-overlay.dts
Normal file
@@ -0,0 +1,12 @@
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/dts-v1/;
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/plugin/;
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#include "trustedvm-kalama-sde.dtsi"
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#include "trustedvm-kalama-sde-display-qrd.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. Kalama QRD - TrustedVM";
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compatible = "qcom,kalama-qrd", "qcom,kalama", "qcom,qrd";
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qcom,msm-id = <519 0x10000>, <536 0x10000>;
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qcom,board-id = <0x1000B 0>, <0x2000B 0>;
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};
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116
display/trustedvm-kalama-sde-display-qrd.dtsi
Normal file
116
display/trustedvm-kalama-sde-display-qrd.dtsi
Normal file
@@ -0,0 +1,116 @@
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#include "trustedvm-kalama-sde-display.dtsi"
|
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&dsi_r66451_amoled_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
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qcom,mdss-dsi-bl-min-level = <1>;
|
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qcom,mdss-dsi-bl-max-level = <4095>;
|
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qcom,mdss-brightness-max-level = <255>;
|
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qcom,mdss-dsi-bl-inverted-dbv;
|
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qcom,platform-reset-gpio = <&tlmm 0 0>;
|
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};
|
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|
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&dsi_r66451_amoled_video {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
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qcom,mdss-dsi-bl-min-level = <1>;
|
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qcom,mdss-dsi-bl-max-level = <4095>;
|
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qcom,mdss-brightness-max-level = <255>;
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qcom,mdss-dsi-bl-inverted-dbv;
|
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qcom,platform-reset-gpio = <&tlmm 0 0>;
|
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};
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&dsi_r66451_amoled_144hz_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <1>;
|
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qcom,mdss-dsi-bl-max-level = <4095>;
|
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qcom,mdss-brightness-max-level = <255>;
|
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qcom,mdss-dsi-bl-inverted-dbv;
|
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qcom,platform-reset-gpio = <&tlmm 0 0>;
|
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};
|
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&dsi_sharp_4k_dsc_cmd {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
|
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qcom,platform-reset-gpio = <&tlmm 0 0>;
|
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};
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&dsi_sharp_4k_dsc_video {
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
|
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qcom,mdss-dsi-bl-min-level = <1>;
|
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qcom,mdss-dsi-bl-max-level = <4095>;
|
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qcom,platform-reset-gpio = <&tlmm 0 0>;
|
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};
|
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&dsi_sharp_1080_cmd {
|
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
|
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qcom,mdss-dsi-bl-min-level = <1>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
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qcom,platform-reset-gpio = <&tlmm 0 0>;
|
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};
|
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&dsi_sharp_qsync_wqhd_cmd {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
|
||||
qcom,mdss-dsi-bl-min-level = <1>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,platform-reset-gpio = <&tlmm 0 0>;
|
||||
};
|
||||
|
||||
&dsi_sharp_qsync_wqhd_video {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
|
||||
qcom,mdss-dsi-bl-min-level = <1>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,platform-reset-gpio = <&tlmm 0 0>;
|
||||
};
|
||||
|
||||
&dsi_sharp_qhd_plus_dsc_cmd {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
|
||||
qcom,mdss-dsi-bl-min-level = <1>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,platform-reset-gpio = <&tlmm 0 0>;
|
||||
};
|
||||
|
||||
&dsi_nt35695b_truly_fhd_cmd {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,platform-reset-gpio = <&tlmm 0 0>;
|
||||
};
|
||||
|
||||
&dsi_sim_dsc_375_cmd {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,platform-reset-gpio = <&tlmm 0 0>;
|
||||
};
|
||||
|
||||
&dsi_sim_vdc_cmd {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,platform-reset-gpio = <&tlmm 0 0>;
|
||||
};
|
||||
|
||||
&dsi_sim_vdc_vid {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,platform-reset-gpio = <&tlmm 0 0>;
|
||||
};
|
||||
|
||||
&dsi_dual_sim_dsc_375_cmd {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,platform-reset-gpio = <&tlmm 0 0>;
|
||||
};
|
||||
|
||||
&dsi_sim_sec_hd_cmd {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <1>;
|
||||
qcom,mdss-dsi-bl-max-level = <1023>;
|
||||
qcom,platform-reset-gpio = <&tlmm 0 0>;
|
||||
};
|
||||
|
||||
&dsi_r66451_amoled_144hz_cmd_cphy {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <1>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <255>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 0 0>;
|
||||
};
|
||||
|
||||
&sde_dsi {
|
||||
qcom,dsi-default-panel = <&dsi_r66451_amoled_144hz_cmd_cphy>;
|
||||
};
|
||||
12
display/trustedvm-kalama-sde-display-rumi-overlay.dts
Normal file
12
display/trustedvm-kalama-sde-display-rumi-overlay.dts
Normal file
@@ -0,0 +1,12 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "trustedvm-kalama-sde.dtsi"
|
||||
#include "trustedvm-kalama-sde-display-rumi.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Kalama Rumi";
|
||||
compatible = "qcom,kalama-rumi", "qcom,kalama";
|
||||
qcom,msm-id = <519 0x10000>;
|
||||
qcom,board-id = <15 0>;
|
||||
};
|
||||
9
display/trustedvm-kalama-sde-display-rumi.dtsi
Normal file
9
display/trustedvm-kalama-sde-display-rumi.dtsi
Normal file
@@ -0,0 +1,9 @@
|
||||
#include "trustedvm-kalama-sde-display.dtsi"
|
||||
|
||||
&dsi_sim_cmd {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
};
|
||||
|
||||
&sde_dsi {
|
||||
qcom,dsi-default-panel = <&dsi_sim_cmd>;
|
||||
};
|
||||
30
display/trustedvm-kalama-sde-display.dtsi
Normal file
30
display/trustedvm-kalama-sde-display.dtsi
Normal file
@@ -0,0 +1,30 @@
|
||||
#include "kalama-sde-display-common.dtsi"
|
||||
|
||||
&sde_dsi {
|
||||
clocks = <&clock_cpucc 0>,
|
||||
<&clock_cpucc 1>,
|
||||
<&clock_cpucc 2>,
|
||||
<&clock_cpucc 3>;
|
||||
clock-names = "pll_byte_clk0", "pll_dsi_clk0",
|
||||
"pll_byte_clk1", "pll_dsi_clk1";
|
||||
};
|
||||
|
||||
&sde_dsi1 {
|
||||
clocks = <&clock_cpucc 0>,
|
||||
<&clock_cpucc 1>,
|
||||
<&clock_cpucc 2>,
|
||||
<&clock_cpucc 3>;
|
||||
clock-names = "pll_byte_clk0", "pll_dsi_clk0",
|
||||
"pll_byte_clk1", "pll_dsi_clk1";
|
||||
};
|
||||
|
||||
&mdss_mdp {
|
||||
connectors = <&sde_dsi &sde_dsi1 &smmu_sde_unsec>;
|
||||
};
|
||||
|
||||
&dsi_sw43404_amoled_cmd {
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <1>;
|
||||
qcom,mdss-dsi-bl-max-level = <1023>;
|
||||
qcom,mdss-brightness-max-level = <255>;
|
||||
};
|
||||
79
display/trustedvm-kalama-sde.dtsi
Normal file
79
display/trustedvm-kalama-sde.dtsi
Normal file
@@ -0,0 +1,79 @@
|
||||
#include <dt-bindings/clock/qcom,gcc-kalama.h>
|
||||
#include <dt-bindings/clock/qcom,dispcc-kalama.h>
|
||||
#include "kalama-sde-common.dtsi"
|
||||
|
||||
&soc {
|
||||
/* dummy display clock provider */
|
||||
clock_cpucc: qcom,cpucc {
|
||||
compatible = "qcom,dummycc";
|
||||
clock-output-names = "cpucc_clocks";
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
smmu_sde_unsec: qcom,smmu_sde_unsec_cb {
|
||||
compatible = "qcom,smmu_sde_unsec";
|
||||
iommus = <&apps_smmu 0x1c04 0x2>;
|
||||
qcom,iommu-dma-addr-pool = <0x00020000 0xfffe0000>;
|
||||
qcom,iommu-faults = "non-fatal";
|
||||
dma-coherent;
|
||||
};
|
||||
};
|
||||
|
||||
&mdss_mdp {
|
||||
reg = <0x0ae00000 0x84000>,
|
||||
<0x0aeb0000 0x2008>,
|
||||
<0x0aeac000 0x800>,
|
||||
<0x0ae8f000 0x02c>;
|
||||
|
||||
reg-names = "mdp_phys",
|
||||
"vbif_phys",
|
||||
"regdma_phys",
|
||||
"sid_phys";
|
||||
|
||||
qcom,sde-vm-exclude-reg-names = "sid_phys";
|
||||
qcom,tvm-include-reg = <0xaf20000 0x4d68>,
|
||||
<0xaf30000 0x3fd4>;
|
||||
|
||||
qcom,sde-hw-version =<0x90000000>;
|
||||
|
||||
clocks = <&clock_cpucc GCC_DISP_AHB_CLK>,
|
||||
<&clock_cpucc GCC_DISP_HF_AXI_CLK>,
|
||||
<&clock_cpucc DISP_CC_MDSS_AHB_CLK>,
|
||||
<&clock_cpucc DISP_CC_MDSS_MDP_CLK>,
|
||||
<&clock_cpucc DISP_CC_MDSS_MDP_CLK_SRC>,
|
||||
<&clock_cpucc DISP_CC_MDSS_VSYNC_CLK>,
|
||||
<&clock_cpucc DISP_CC_MDSS_MDP_LUT_CLK>;
|
||||
clock-names = "gcc_iface", "gcc_bus", "iface_clk", "branch_clk",
|
||||
"core_clk", "vsync_clk", "lut_clk";
|
||||
qcom,sde-trusted-vm-env;
|
||||
};
|
||||
|
||||
&mdss_dsi0 {
|
||||
clocks = <&clock_cpucc DISP_CC_MDSS_BYTE0_CLK>,
|
||||
<&clock_cpucc DISP_CC_MDSS_BYTE0_CLK_SRC>,
|
||||
<&clock_cpucc DISP_CC_MDSS_BYTE0_INTF_CLK>,
|
||||
<&clock_cpucc DISP_CC_MDSS_PCLK0_CLK>,
|
||||
<&clock_cpucc DISP_CC_MDSS_PCLK0_CLK_SRC>,
|
||||
<&clock_cpucc DISP_CC_MDSS_ESC0_CLK>;
|
||||
clock-names = "byte_clk", "byte_clk_rcg", "byte_intf_clk",
|
||||
"pixel_clk", "pixel_clk_rcg", "esc_clk";
|
||||
};
|
||||
|
||||
&mdss_dsi1 {
|
||||
clocks = <&clock_cpucc DISP_CC_MDSS_BYTE1_CLK>,
|
||||
<&clock_cpucc DISP_CC_MDSS_BYTE1_CLK_SRC>,
|
||||
<&clock_cpucc DISP_CC_MDSS_BYTE1_INTF_CLK>,
|
||||
<&clock_cpucc DISP_CC_MDSS_PCLK1_CLK>,
|
||||
<&clock_cpucc DISP_CC_MDSS_PCLK1_CLK_SRC>,
|
||||
<&clock_cpucc DISP_CC_MDSS_ESC1_CLK>;
|
||||
clock-names = "byte_clk", "byte_clk_rcg", "byte_intf_clk",
|
||||
"pixel_clk", "pixel_clk_rcg", "esc_clk";
|
||||
};
|
||||
|
||||
&mdss_dsi_phy0 {
|
||||
qcom,dsi-pll-in-trusted-vm;
|
||||
};
|
||||
|
||||
&mdss_dsi_phy1 {
|
||||
qcom,dsi-pll-in-trusted-vm;
|
||||
};
|
||||
Reference in New Issue
Block a user