ARM: dts: msm: add dma-coherent option for etr1

Add dma-coherent option for etr1 on kalama to fix
dma_sync_for_single_cpu() issue, which cause by a upstream
change "Speed up for bounce buffer in flat mode". this change
uses “dma_alloc_noncoherent + cache sync” to replace
dma_alloc_coherent, These APIs only work with contiguous memory.
since etr support iommu, etr buffer physical address is not
contiguous.

Change-Id: Idd7550151ea45576f3af2add0b930caa62a933de
This commit is contained in:
Tao Zhang
2022-03-02 15:22:59 +08:00
committed by Gerrit - the friendly Code Review server
parent bbac7a2dea
commit 99c7d4ccf9

View File

@@ -3371,6 +3371,7 @@
iommus = <&apps_smmu 0x0500 0>;
qcom,iommu-dma-addr-pool = <0x0 0xffc00000>;
dma-coherent;
coresight-csr = <&csr>;
csr-atid-offset = <0x108>;