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ARM: dts: msm: add dma-coherent option for etr1
Add dma-coherent option for etr1 on kalama to fix dma_sync_for_single_cpu() issue, which cause by a upstream change "Speed up for bounce buffer in flat mode". this change uses “dma_alloc_noncoherent + cache sync” to replace dma_alloc_coherent, These APIs only work with contiguous memory. since etr support iommu, etr buffer physical address is not contiguous. Change-Id: Idd7550151ea45576f3af2add0b930caa62a933de
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@@ -3371,6 +3371,7 @@
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iommus = <&apps_smmu 0x0500 0>;
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qcom,iommu-dma-addr-pool = <0x0 0xffc00000>;
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dma-coherent;
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coresight-csr = <&csr>;
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csr-atid-offset = <0x108>;
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