ARM: dts: msm: Update PCIe RC0 PHY registers for QRD v102

QRD platform has ultrashort PCIe channel for RC0,
update PHY settings for <5DB loss.

Change-Id: Iee5dbae63cfccd4552b21c94901893020f1b2e0c
This commit is contained in:
Vivek Pernamitta
2022-11-15 10:18:21 +05:30
parent 69751c78e1
commit a2c4ad2608

View File

@@ -344,7 +344,7 @@
};
&pcie0 {
qcom,pcie-phy-ver = <101>;
qcom,pcie-phy-ver = <102>;
qcom,phy-sequence = <0x0240 0x03 0x0
0x00c0 0x01 0x0
0x00cc 0x62 0x0
@@ -452,12 +452,12 @@
0x060c 0x1d 0x0
0x0614 0x07 0x0
0x0620 0xc1 0x0
0x0368 0x0F 0x0
0x1180 0x8C 0x0
0x1980 0x8C 0x0
0x0368 0x0f 0x0
0x1180 0x8f 0x0
0x1980 0x8f 0x0
0x0120 0x40 0x0
0x0080 0x0A 0x0
0x0084 0x1A 0x0
0x0080 0x0a 0x0
0x0084 0x1a 0x0
0x0020 0x14 0x0
0x0024 0x34 0x0
0x0624 0x05 0x0