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https://github.com/Evolution-X-Devices/kernel_oneplus_sm8550-devicetrees
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ARM: dts: msm: update coresight device tree for kalama
Update device tree for coresight on kalama. 1. Add lpass stm node. 2. Add lpass lpi funnel 1 node. 3. Add gladiator and ddr dl1 funnel node. 4. Add ctis for cpu0-cpu7. 5. Change the register address for the coresight-funnel-turing_dup. 6. Add the property arm,coresight-loses-context-with-cpu for ete0 to ete7. Change-Id: I3c4d5c49a3685d9d1c4a2cba5503f54d133f7afd
This commit is contained in:
Tao Zhang
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Gerrit - the friendly Code Review server
parent
bf757d1463
commit
a3e1348d20
@@ -25,9 +25,26 @@
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out-ports {
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port {
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tpdm_lpass_lpi_out_funnel_lpass_lpi: endpoint {
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tpdm_lpass_lpi_1_out_funnel_lpass_lpi: endpoint {
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remote-endpoint =
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<&funnel_lpass_lpi_in_tpdm_lpass_lpi>;
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<&funnel_lpass_lpi_in_tpdm_lpass_lpi_1>;
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};
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};
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};
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};
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lpass_stm: lpass_stm {
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compatible = "qcom,coresight-dummy";
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coresight-name = "coresight-lpass-stm";
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qcom,dummy-source;
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atid = <25>;
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out-ports {
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port {
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lpass_stm_out_funnel_lpass_lpi_1: endpoint {
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remote-endpoint =
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<&funnel_lpass_lpi_1_in_lpass_stm>;
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};
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};
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};
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@@ -1217,9 +1234,46 @@
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};
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};
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funnel_lpass_lpi: funnel@10b44000 {
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funnel_lpass_lpi_1: funnel@10b50000 {
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compatible = "arm,coresight-static-funnel";
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coresight-name = "coresight-funnel-lpass_lpi";
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coresight-name = "coresight-funnel-lpass_lpi_1";
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in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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funnel_lpass_lpi_1_in_lpass_stm: endpoint {
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remote-endpoint =
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<&lpass_stm_out_funnel_lpass_lpi_1>;
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};
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};
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port@1 {
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reg = <1>;
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funnel_lpass_lpi_in_tpdm_lpass_lpi_1: endpoint {
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remote-endpoint =
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<&tpdm_lpass_lpi_1_out_funnel_lpass_lpi>;
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};
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};
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};
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out-ports {
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port {
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funnel_lpass_lpi_1_out_funnel_lpass_lpi_0: endpoint {
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remote-endpoint =
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<&funnel_lpass_lpi_0_in_funnel_lpass_lpi_1>;
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};
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};
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};
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};
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funnel_lpass_lpi_0: funnel@10b44000 {
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compatible = "arm,coresight-static-funnel";
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coresight-name = "coresight-funnel-lpass_lpi_0";
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in-ports {
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#address-cells = <1>;
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@@ -1235,9 +1289,9 @@
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port@7 {
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reg = <7>;
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funnel_lpass_lpi_in_tpdm_lpass_lpi: endpoint {
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funnel_lpass_lpi_0_in_funnel_lpass_lpi_1: endpoint {
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remote-endpoint =
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<&tpdm_lpass_lpi_out_funnel_lpass_lpi>;
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<&funnel_lpass_lpi_1_out_funnel_lpass_lpi_0>;
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};
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};
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@@ -1473,6 +1527,63 @@
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};
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};
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gladiator: gladiator {
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compatible = "qcom,coresight-dummy";
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coresight-name = "coresight-gladiator";
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qcom,dummy-source;
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atid = <96>;
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out-ports {
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port {
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gladiator_out_funnel_ddr_dl1: endpoint {
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remote-endpoint =
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<&funnel_ddr_dl1_in_gladiator>;
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};
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};
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};
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};
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funnel_ddr_dl1: funnel@10d0a000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb908>;
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reg = <0x10d0a000 0x1000>;
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reg-names = "funnel-base";
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coresight-name = "coresight-funnel-ddr_dl1";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@3 {
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reg = <3>;
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funnel_ddr_dl1_in_gladiator: endpoint {
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remote-endpoint =
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<&gladiator_out_funnel_ddr_dl1>;
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};
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};
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};
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out-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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funnel_ddr_dl1_out_funnel_ddr_dl0: endpoint {
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remote-endpoint =
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<&funnel_ddr_dl0_in_funnel_ddr_dl1>;
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};
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};
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};
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};
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funnel_ddr_dl0: funnel@10d03000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb908>;
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@@ -1521,6 +1632,13 @@
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};
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};
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port@4 {
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reg = <4>;
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funnel_ddr_dl0_in_funnel_ddr_dl1: endpoint {
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remote-endpoint =
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<&funnel_ddr_dl1_out_funnel_ddr_dl0>;
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};
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};
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};
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out-ports {
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@@ -1563,6 +1681,13 @@
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};
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};
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port@4 {
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reg = <4>;
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funnel_ddr_dl0_out_funnel_dl_center: endpoint {
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remote-endpoint =
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<&funnel_dl_center_in_funnel_ddr_dl0>;
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};
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};
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};
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};
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@@ -1570,8 +1695,8 @@
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb908>;
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reg = <0x10986000 0x1000>,
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<0x10985000 0x1000>;
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reg = <0x10984000 0x1000>,
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<0x10983000 0x1000>;
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reg-names = "funnel-base-dummy", "funnel-base-real";
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coresight-name = "coresight-funnel-turing_dup";
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@@ -1583,8 +1708,8 @@
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in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@3 {
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reg = <3>;
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port@4 {
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reg = <4>;
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funnel_turing_dup_in_turing_etm0: endpoint {
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remote-endpoint =
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<&turing_etm0_out_funnel_turing_dup>;
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@@ -1636,8 +1761,8 @@
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};
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};
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port@4 {
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reg = <4>;
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port@5 {
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reg = <5>;
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funnel_turing_in_funnel_turing_dup: endpoint {
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remote-endpoint =
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<&funnel_turing_dup_out_funnel_turing>;
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@@ -2654,6 +2779,14 @@
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};
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};
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port@4 {
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reg = <4>;
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funnel_dl_center_in_funnel_ddr_dl0: endpoint {
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remote-endpoint =
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<&funnel_ddr_dl0_out_funnel_dl_center>;
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};
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};
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port@6 {
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reg = <6>;
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funnel_dl_center_in_funnel_turing: endpoint {
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@@ -3741,6 +3874,94 @@
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clock-names = "apb_pclk";
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};
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cpu0: cti@12010000 {
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compatible = "arm,coresight-cti", "arm,primecell";
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reg = <0x12010000 0x1000>;
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arm,primecell-periphid = <0x000bb922>;
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coresight-name = "coresight-cti-cpu0";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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cpu1: cti@12020000 {
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compatible = "arm,coresight-cti", "arm,primecell";
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reg = <0x12020000 0x1000>;
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arm,primecell-periphid = <0x000bb922>;
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coresight-name = "coresight-cti-cpu1";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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cpu2: cti@12030000 {
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compatible = "arm,coresight-cti", "arm,primecell";
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reg = <0x12030000 0x1000>;
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arm,primecell-periphid = <0x000bb922>;
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coresight-name = "coresight-cti-cpu2";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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cpu3: cti@12040000 {
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compatible = "arm,coresight-cti", "arm,primecell";
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reg = <0x12040000 0x1000>;
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arm,primecell-periphid = <0x000bb922>;
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coresight-name = "coresight-cti-cpu3";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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cpu4: cti@12050000 {
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compatible = "arm,coresight-cti", "arm,primecell";
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reg = <0x12050000 0x1000>;
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arm,primecell-periphid = <0x000bb922>;
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coresight-name = "coresight-cti-cpu4";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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cpu5: cti@112060000 {
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compatible = "arm,coresight-cti", "arm,primecell";
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reg = <0x12060000 0x1000>;
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arm,primecell-periphid = <0x000bb922>;
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coresight-name = "coresight-cti-cpu5";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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cpu6: cti@12070000 {
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compatible = "arm,coresight-cti", "arm,primecell";
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reg = <0x12070000 0x1000>;
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arm,primecell-periphid = <0x000bb922>;
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coresight-name = "coresight-cti-cpu6";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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cpu7: cti@12080000 {
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compatible = "arm,coresight-cti", "arm,primecell";
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reg = <0x12080000 0x1000>;
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arm,primecell-periphid = <0x000bb922>;
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coresight-name = "coresight-cti-cpu7";
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clocks = <&aoss_qmp>;
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clock-names = "apb_pclk";
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};
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ipcb_tgu: tgu@10b0e000 {
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compatible = "arm,primecell";
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arm,primecell-periphid = <0x000bb999>;
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@@ -3764,6 +3985,7 @@
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coresight-name = "coresight-ete0";
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qcom,skip-power-up;
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atid = <1>;
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arm,coresight-loses-context-with-cpu;
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out-ports {
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port {
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ete0_out_funnel_ete: endpoint {
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@@ -3780,6 +4002,7 @@
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coresight-name = "coresight-ete1";
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qcom,skip-power-up;
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atid = <2>;
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arm,coresight-loses-context-with-cpu;
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out-ports {
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port {
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ete1_out_funnel_ete: endpoint {
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@@ -3796,6 +4019,7 @@
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coresight-name = "coresight-ete2";
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qcom,skip-power-up;
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atid = <3>;
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arm,coresight-loses-context-with-cpu;
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out-ports {
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port {
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ete2_out_funnel_ete: endpoint {
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@@ -3812,6 +4036,7 @@
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coresight-name = "coresight-ete3";
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qcom,skip-power-up;
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atid = <4>;
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arm,coresight-loses-context-with-cpu;
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out-ports {
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port {
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ete3_out_funnel_ete: endpoint {
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@@ -3828,6 +4053,7 @@
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coresight-name = "coresight-ete4";
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qcom,skip-power-up;
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atid = <5>;
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arm,coresight-loses-context-with-cpu;
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out-ports {
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port {
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ete4_out_funnel_ete: endpoint {
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@@ -3844,6 +4070,7 @@
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coresight-name = "coresight-ete5";
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qcom,skip-power-up;
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atid = <6>;
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arm,coresight-loses-context-with-cpu;
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out-ports {
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port {
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ete5_out_funnel_ete: endpoint {
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@@ -3860,6 +4087,7 @@
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coresight-name = "coresight-ete6";
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qcom,skip-power-up;
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atid = <7>;
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arm,coresight-loses-context-with-cpu;
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out-ports {
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port {
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ete6_out_funnel_ete: endpoint {
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@@ -3876,6 +4104,7 @@
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coresight-name = "coresight-ete7";
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qcom,skip-power-up;
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atid = <8>;
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arm,coresight-loses-context-with-cpu;
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out-ports {
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port {
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ete7_out_funnel_ete: endpoint {
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