ARM: dts: msm: Correct PCIe EP's mhi-soc-reset-offset on sdxpinn

Correct PCIe EP's mhi-soc-reset-offset on sdxpinn.

Change-Id: Ic5c26c96a703b7871a2ddbce2e3cea83b4475d4d
This commit is contained in:
Can Guo
2022-10-02 06:21:57 -07:00
parent 348b8ac9ed
commit b6bcb4082b

View File

@@ -1079,7 +1079,7 @@
qcom,pcie-aggregated-irq;
qcom,pcie-mhi-a7-irq;
qcom,phy-status-reg2 = <0x1214>;
qcom,mhi-soc-reset-offset = <0xb01b8>;
qcom,mhi-soc-reset-offset = <0xb001b8>;
qcom,aoss-rst-clr;
qcom,aux-clk = <0x13>;