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https://github.com/Evolution-X-Devices/kernel_oneplus_sm8550-devicetrees
synced 2026-02-01 09:49:52 +00:00
Merge "ARM: dts: msm: Add rpm-smd to cluster-pd3 power domain for khaje"
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qctecmdr
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Gerrit - the friendly Code Review server
commit
b9a55a01f7
166
qcom/khaje.dtsi
166
qcom/khaje.dtsi
@@ -44,6 +44,9 @@
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reg = <0x0 0x0>;
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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cpu-idle-states = <&SILVER_OFF>;
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power-domains = <&CPU_PD0>;
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power-domain-names = "psci";
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enable-method = "psci";
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next-level-cache = <&L2_0>;
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qcom,freq-domain = <&cpufreq_hw 0 7>;
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@@ -69,6 +72,9 @@
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reg = <0x0 0x1>;
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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cpu-idle-states = <&SILVER_OFF>;
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power-domains = <&CPU_PD1>;
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power-domain-names = "psci";
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enable-method = "psci";
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next-level-cache = <&L2_0>;
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qcom,freq-domain = <&cpufreq_hw 0 7>;
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@@ -89,6 +95,9 @@
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reg = <0x0 0x2>;
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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cpu-idle-states = <&SILVER_OFF>;
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power-domains = <&CPU_PD2>;
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power-domain-names = "psci";
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enable-method = "psci";
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next-level-cache = <&L2_0>;
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qcom,freq-domain = <&cpufreq_hw 0 7>;
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@@ -109,6 +118,9 @@
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reg = <0x0 0x3>;
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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cpu-idle-states = <&SILVER_OFF>;
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power-domains = <&CPU_PD3>;
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power-domain-names = "psci";
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enable-method = "psci";
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next-level-cache = <&L2_0>;
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qcom,freq-domain = <&cpufreq_hw 0 7>;
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@@ -127,6 +139,9 @@
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x100>;
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cpu-idle-states = <&GOLD_OFF>;
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power-domains = <&CPU_PD4>;
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power-domain-names = "psci";
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enable-method = "psci";
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capacity-dmips-mhz = <1638>;
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dynamic-power-coefficient = <282>;
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@@ -154,6 +169,9 @@
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reg = <0x0 0x101>;
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capacity-dmips-mhz = <1638>;
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dynamic-power-coefficient = <282>;
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cpu-idle-states = <&GOLD_OFF>;
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power-domains = <&CPU_PD5>;
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power-domain-names = "psci";
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enable-method = "psci";
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next-level-cache = <&L2_1>;
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qcom,freq-domain = <&cpufreq_hw 1 7>;
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@@ -175,6 +193,9 @@
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capacity-dmips-mhz = <1638>;
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dynamic-power-coefficient = <282>;
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enable-method = "psci";
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cpu-idle-states = <&GOLD_OFF>;
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power-domains = <&CPU_PD6>;
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power-domain-names = "psci";
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next-level-cache = <&L2_1>;
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qcom,freq-domain = <&cpufreq_hw 1 7>;
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qcom,lmh-dcvs = <&lmh_dcvs1>;
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@@ -195,6 +216,9 @@
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capacity-dmips-mhz = <1638>;
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dynamic-power-coefficient = <282>;
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enable-method = "psci";
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cpu-idle-states = <&GOLD_OFF>;
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power-domains = <&CPU_PD7>;
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power-domain-names = "psci";
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next-level-cache = <&L2_1>;
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qcom,freq-domain = <&cpufreq_hw 1 7>;
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qcom,lmh-dcvs = <&lmh_dcvs1>;
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@@ -247,9 +271,130 @@
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};
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};
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idle-states {
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SILVER_OFF: silver-c3 { /* C3 */
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compatible = "arm,idle-state";
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idle-state-name = "pc";
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entry-latency-us = <297>;
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exit-latency-us = <324>;
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min-residency-us = <1110>;
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arm,psci-suspend-param = <0x40000003>;
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local-timer-stop;
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};
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GOLD_OFF: gold-c3 { /* C3 */
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compatible = "arm,idle-state";
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idle-state-name = "pc";
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entry-latency-us = <290>;
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exit-latency-us = <376>;
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min-residency-us = <1182>;
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arm,psci-suspend-param = <0x40000003>;
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local-timer-stop;
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};
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SILVER_CLUSTER_D3: silver-cluster-d3 { /* D3 */
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compatible = "domain-idle-state";
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idle-state-name = "pwr-l2-pc";
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entry-latency-us = <640>;
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exit-latency-us = <1664>;
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min-residency-us = <8094>;
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arm,psci-suspend-param = <0x41000043>;
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};
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GOLD_CLUSTER_D3: gold-cluster-d3 { /* D3 */
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compatible = "domain-idle-state";
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idle-state-name = "perf-l2-pc";
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entry-latency-us = <800>;
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exit-latency-us = <2118>;
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min-residency-us = <7376>;
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arm,psci-suspend-param = <0x41000043>;
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};
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APSS_WFI: cluster-e1 { /* E1 */
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compatible = "domain-idle-state";
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idle-state-name = "cci-ret";
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entry-latency-us = <108>;
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exit-latency-us = <450>;
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min-residency-us = <153>;
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arm,psci-suspend-param = <0x42000043>;
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};
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APSS_OFF: cluster-e3 { /* E3 */
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compatible = "domain-idle-state";
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idle-state-name = "cci-pc";
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entry-latency-us = <10831>;
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exit-latency-us = <4506>;
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min-residency-us = <15338>;
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arm,psci-suspend-param = <0x42000343>;
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};
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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CPU_PD0: cpu-pd0 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD0>;
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};
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CPU_PD1: cpu-pd1 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD0>;
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};
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CPU_PD2: cpu-pd2 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD0>;
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};
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CPU_PD3: cpu-pd3 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD0>;
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};
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CPU_PD4: cpu-pd4 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD1>;
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};
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CPU_PD5: cpu-pd5 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD1>;
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};
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CPU_PD6: cpu-pd6 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD1>;
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};
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CPU_PD7: cpu-pd7 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD1>;
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};
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CLUSTER_PD0: cluster-pd0 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD2>;
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domain-idle-states = <&SILVER_CLUSTER_D3>;
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};
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CLUSTER_PD1: cluster-pd1 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD2>;
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domain-idle-states = <&GOLD_CLUSTER_D3>;
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};
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CLUSTER_PD2: cluster-pd2 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD3>;
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domain-idle-states = <&APSS_WFI>;
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};
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CLUSTER_PD3: cluster-pd3 {
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#power-domain-cells = <0>;
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domain-idle-states = <&APSS_OFF>;
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};
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};
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firmware: firmware {
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@@ -1924,6 +2069,7 @@
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compatible = "qcom,rpm-smd";
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rpm-channel-name = "rpm_requests";
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interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>;
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power-domains = <&CLUSTER_PD3>;
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rpm-channel-type = <15>; /* SMD_APPS_RPM */
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};
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@@ -1945,6 +2091,26 @@
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0x0f0a80b8 0x0f0b80b8>;
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};
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cluster-device0 {
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compatible = "qcom,lpm-cluster-dev";
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power-domains = <&CLUSTER_PD0>;
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};
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cluster-device1 {
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compatible = "qcom,lpm-cluster-dev";
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power-domains = <&CLUSTER_PD1>;
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};
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cluster-device2 {
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compatible = "qcom,lpm-cluster-dev";
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power-domains = <&CLUSTER_PD2>;
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};
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cluster-device3 {
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compatible = "qcom,lpm-cluster-dev";
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power-domains = <&CLUSTER_PD3>;
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};
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qcom,ghd {
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compatible = "qcom,gladiator-hang-detect";
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qcom,threshold-arr = <0x0f1d141c 0x0f1d1420
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