mirror of
https://github.com/Evolution-X-Devices/kernel_oneplus_sm8550-devicetrees
synced 2026-02-01 09:49:52 +00:00
Merge remote-tracking branch 'msm-kalama' into 515
* msm-kalama: ARM: dts: msm: Add cpuidle states for kalama ARM: dts: msm: Add ADSP sleepmon document ARM: dts: msm: add audio codecs reset pin control ARM: dts: qcom: Comment out qrtr,gpiomem vdevices ARM: dts: qcom: Add waipio vm dt support for msm-kalama dt-bindings: pci-msm: Update qcom,drv-supported name ARM: dts: qcom: Update Makefile to VM images ARM: dts: msm: enable rmtfs module ARM: dts: msm: Add GICv3 ITS node for kalama Change-Id: Ibe5690a1e584a6abe8e68cd6ef24a1aa7357fdea
This commit is contained in:
@@ -212,9 +212,9 @@ interconnects:
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- BIT(1) PCIe bus driver will not start enumeration if it
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receives a WAKE interrupt
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- qcom,drv-supported:
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- qcom,drv-name:
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Usage: optional
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Value type: <bool>
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Value type: <string>
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Definition: Direct resource vote (DRV) is supported. APPS PCIe
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root complex driver can hand off PCIe resources to another
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subsystem. This will allow APPS to enter lower power modes
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@@ -503,7 +503,7 @@ Example
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qcom,target-link-speed = <0x2>;
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qcom,link-check-max-count = <40> /* 200ms */
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qcom,boot-option = <0x1>;
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qcom,drv-supported;
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qcom,drv-name = "lpass";
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qcom,use-19p2mhz-aux-clk;
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qcom,common-clk-en;
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qcom,clk-power-manage-en;
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60
bindings/soc/qcom/adsp_sleepmon.txt
Normal file
60
bindings/soc/qcom/adsp_sleepmon.txt
Normal file
@@ -0,0 +1,60 @@
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Qualcomm Technologies, Inc. ADSP Sleep Monitor
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The ADSP Sleep monitor driver tracks ADSP sleep statistics stored in SMEM region
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and establishes an interface with different userspace clients which make use of
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ADSP subsystem. Based on the activity notifications from the userspace clients
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for activity start and stop notifications, the driver detects and logs an error
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message in kernel logs and creates a kernel panic (when enabled) upon detecting
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a violation in ADSP sleep/LPI state after the configured monitoring duration.
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By default the driver emits out kernel message on detecting these violations,
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optionally a kernel panic can be enabled separately for ADSP sleep or LPI
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issues via this config. When enabled, corresponding panics can be
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disabled/re-enabled runtime via debugfs node exposed from the driver.
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"echo 0 > /d/adspsleepmon/panic-state" --> Disables kernel panic for ADSP sleep and LPI voilations.
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"echo 1 > /d/adspsleepmon/panic-state" --> Enables kernel panic for ADSP sleep voilations.
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"echo 2 > /d/adspsleepmon/panic-state" --> Enables kernel panic for ADSP LPI voilations.
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"echo 3 > /d/adspsleepmon/panic-state" --> Enables kernel panic for ADSP Sleep and LPI voilations.
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"cat /d/adspsleepmon/read_panic_state" --> Displays the current panic enablement status
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Examples:
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"cat /d/adspsleepmon/read_panic_state"
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>Panic State: LPM and LPI panics Disabled
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"cat /d/adspsleepmon/read_panic_state"
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>Panic State: LPI Panic enabled
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properties:
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- compatible: Must be "qcom,adsp-sleepmon".
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- qcom,wait_time_lpm: wait time in seconds for LPM violation detections.
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The ADSP sleep monitor would wait for the specified
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duration after all the activities are done
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(based on user space clients activity notifications)
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before checking ADSP state.
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- qcom,wait_time_lpi: wait time in seconds for LPI violation detections.
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The ADSP sleep monitor would wait for the specified
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duration after the start of an LPI only activity
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(based on user space clients activity notifications)
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before checking ADSP state.
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- qcom,enable_panic_lpm: Enables kernel panic on detecting ADSP sleep violations.
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- qcom,enable_panic_lpi: Enables kernel panic on detecting ADSP LPI violations.
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Example:
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adsp_sleepmon: adsp-sleepmon {
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compatible = "qcom,adsp-sleepmon";
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qcom,wait_time_lpm = <5>;
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qcom,wait_time_lpi = <15>;
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qcom,enable_panic_lpm;
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qcom,enable_panic_lpi;
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};
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@@ -74,11 +74,21 @@ endif
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ifeq ($(CONFIG_ARCH_KALAMA), y)
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ifeq ($(CONFIG_ARCH_QTI_VM), y)
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dtb-$(CONFIG_ARCH_QTI_VM) += kalama-vm-rumi.dtb \
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kalama_tuivm-dtb-$(CONFIG_ARCH_QTI_VM) += kalama-vm-rumi.dtb \
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kalama-vm-mtp.dtb \
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kalama-vm-cdp.dtb \
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kalama-vm-qrd.dtb
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dtb-y += $(kalama_tuivm-dtb-y)
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endif
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endif
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ifeq ($(CONFIG_ARCH_WAIPIO), y)
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ifeq ($(CONFIG_ARCH_QTI_VM), y)
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waipio_tuivm-dtb-$(CONFIG_ARCH_QTI_VM) += waipio-vm-mtp.dtb \
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waipio-vm-cdp.dtb \
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waipio-vm-qrd.dtb \
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waipio-vm-rumi.dtb
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dtb-y += $(waipio_tuivm-dtb-y)
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endif
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endif
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@@ -78,4 +78,741 @@
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drive-strength = <2>;
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};
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};
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aux0_pcm_clk {
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aux0_pcm_clk_sleep: aux0_pcm_clk_sleep {
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mux {
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pins = "gpio126";
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function = "gpio";
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};
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config {
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pins = "gpio126";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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aux0_pcm_clk_active: aux0_pcm_clk_active {
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mux {
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pins = "gpio126";
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function = "mi2s0_sck";
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};
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config {
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pins = "gpio126";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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aux0_pcm_ws {
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aux0_pcm_ws_sleep: aux0_pcm_ws_sleep {
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mux {
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pins = "gpio129";
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function = "gpio";
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};
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config {
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pins = "gpio129";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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aux0_pcm_ws_active: aux0_pcm_ws_active {
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mux {
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pins = "gpio129";
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function = "mi2s0_ws";
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};
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config {
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pins = "gpio129";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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aux0_pcm_din {
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aux0_pcm_din_sleep: aux0_pcm_din_sleep {
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mux {
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pins = "gpio127";
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function = "gpio";
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};
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config {
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pins = "gpio127";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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aux0_pcm_din_active: aux0_pcm_din_active {
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mux {
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pins = "gpio127";
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function = "mi2s0_data0";
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};
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config {
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pins = "gpio127";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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};
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};
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};
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aux0_pcm_dout {
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aux0_pcm_dout_sleep: aux0_pcm_dout_sleep {
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mux {
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pins = "gpio128";
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function = "gpio";
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};
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config {
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pins = "gpio128";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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aux0_pcm_dout_active: aux0_pcm_dout_active {
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mux {
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pins = "gpio128";
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function = "mi2s0_data1";
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||||
};
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config {
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||||
pins = "gpio128";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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};
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};
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};
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aux1_pcm_clk {
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aux1_pcm_clk_sleep: aux1_pcm_clk_sleep {
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mux {
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pins = "gpio121";
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function = "gpio";
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};
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||||
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config {
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pins = "gpio121";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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aux1_pcm_clk_active: aux1_pcm_clk_active {
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mux {
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pins = "gpio121";
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function = "mi2s2_sck";
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||||
};
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|
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config {
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pins = "gpio121";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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aux1_pcm_ws {
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aux1_pcm_ws_sleep: aux1_pcm_ws_sleep {
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mux {
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pins = "gpio123";
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function = "gpio";
|
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};
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config {
|
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pins = "gpio123";
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drive-strength = <2>; /* 2 mA */
|
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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aux1_pcm_ws_active: aux1_pcm_ws_active {
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mux {
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pins = "gpio123";
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function = "mi2s2_ws";
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};
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|
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config {
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pins = "gpio123";
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drive-strength = <8>; /* 8 mA */
|
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bias-disable; /* NO PULL */
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output-high;
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};
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};
|
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};
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|
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aux1_pcm_din {
|
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aux1_pcm_din_sleep: aux1_pcm_din_sleep {
|
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mux {
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pins = "gpio122";
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function = "gpio";
|
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};
|
||||
|
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config {
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pins = "gpio122";
|
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drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
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input-enable;
|
||||
};
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};
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|
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aux1_pcm_din_active: aux1_pcm_din_active {
|
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mux {
|
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pins = "gpio122";
|
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function = "mi2s2_data0";
|
||||
};
|
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|
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config {
|
||||
pins = "gpio122";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
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};
|
||||
};
|
||||
};
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|
||||
aux1_pcm_dout {
|
||||
aux1_pcm_dout_sleep: aux1_pcm_dout_sleep {
|
||||
mux {
|
||||
pins = "gpio124";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio124";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
aux1_pcm_dout_active: aux1_pcm_dout_active {
|
||||
mux {
|
||||
pins = "gpio124";
|
||||
function = "mi2s2_data1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio124";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tdm0_clk {
|
||||
tdm0_clk_sleep: tdm0_clk_sleep {
|
||||
mux {
|
||||
pins = "gpio126";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio126";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
tdm0_clk_active: tdm0_clk_active {
|
||||
mux {
|
||||
pins = "gpio126";
|
||||
function = "mi2s0_sck";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio126";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tdm0_ws {
|
||||
tdm0_ws_sleep: tdm0_ws_sleep {
|
||||
mux {
|
||||
pins = "gpio129";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio129";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
tdm0_ws_active: tdm0_ws_active {
|
||||
mux {
|
||||
pins = "gpio129";
|
||||
function = "mi2s0_ws";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio129";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tdm0_din {
|
||||
tdm0_din_sleep: tdm0_din_sleep {
|
||||
mux {
|
||||
pins = "gpio127";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio127";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
tdm0_din_active: tdm0_din_active {
|
||||
mux {
|
||||
pins = "gpio127";
|
||||
function = "mi2s0_data0";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio127";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tdm0_dout {
|
||||
tdm0_dout_sleep: tdm0_dout_sleep {
|
||||
mux {
|
||||
pins = "gpio128";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio128";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
tdm0_dout_active: tdm0_dout_active {
|
||||
mux {
|
||||
pins = "gpio128";
|
||||
function = "mi2s0_data1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio128";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tdm1_clk {
|
||||
tdm1_clk_sleep: tdm1_clk_sleep {
|
||||
mux {
|
||||
pins = "gpio121";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio121";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
tdm1_clk_active: tdm1_clk_active {
|
||||
mux {
|
||||
pins = "gpio121";
|
||||
function = "mi2s2_sck";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio121";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tdm1_ws {
|
||||
tdm1_ws_sleep: tdm1_ws_sleep {
|
||||
mux {
|
||||
pins = "gpio123";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio123";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
tdm1_ws_active: tdm1_ws_active {
|
||||
mux {
|
||||
pins = "gpio123";
|
||||
function = "mi2s2_ws";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio123";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tdm1_din {
|
||||
tdm1_din_sleep: tdm1_din_sleep {
|
||||
mux {
|
||||
pins = "gpio122";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio122";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
tdm1_din_active: tdm1_din_active {
|
||||
mux {
|
||||
pins = "gpio122";
|
||||
function = "mi2s2_data0";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio122";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tdm1_dout {
|
||||
tdm1_dout_sleep: tdm1_dout_sleep {
|
||||
mux {
|
||||
pins = "gpio124";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio124";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
tdm1_dout_active: tdm1_dout_active {
|
||||
mux {
|
||||
pins = "gpio124";
|
||||
function = "mi2s2_data1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio124";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2s0_sck {
|
||||
i2s0_sck_sleep: i2s0_sck_sleep {
|
||||
mux {
|
||||
pins = "gpio126";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio126";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2s0_sck_active: i2s0_sck_active {
|
||||
mux {
|
||||
pins = "gpio126";
|
||||
function = "mi2s0_sck";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio126";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2s0_ws {
|
||||
i2s0_ws_sleep: i2s0_ws_sleep {
|
||||
mux {
|
||||
pins = "gpio129";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio129";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2s0_ws_active: i2s0_ws_active {
|
||||
mux {
|
||||
pins = "gpio129";
|
||||
function = "mi2s0_ws";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio129";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2s0_sd0 {
|
||||
i2s0_sd0_sleep: i2s0_sd0_sleep {
|
||||
mux {
|
||||
pins = "gpio127";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio127";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2s0_sd0_active: i2s0_sd0_active {
|
||||
mux {
|
||||
pins = "gpio127";
|
||||
function = "mi2s0_data0";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio127";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2s0_sd1 {
|
||||
i2s0_sd1_sleep: i2s0_sd1_sleep {
|
||||
mux {
|
||||
pins = "gpio128";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio128";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2s0_sd1_active: i2s0_sd1_active {
|
||||
mux {
|
||||
pins = "gpio128";
|
||||
function = "mi2s0_data1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio128";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2s1_sck {
|
||||
i2s1_sck_sleep: i2s1_sck_sleep {
|
||||
mux {
|
||||
pins = "gpio121";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio121";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2s1_sck_active: i2s1_sck_active {
|
||||
mux {
|
||||
pins = "gpio121";
|
||||
function = "mi2s2_sck";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio121";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2s1_ws {
|
||||
i2s1_ws_sleep: i2s1_ws_sleep {
|
||||
mux {
|
||||
pins = "gpio123";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio123";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2s1_ws_active: i2s1_ws_active {
|
||||
mux {
|
||||
pins = "gpio123";
|
||||
function = "mi2s2_ws";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio123";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2s1_sd0 {
|
||||
i2s1_sd0_sleep: i2s1_sd0_sleep {
|
||||
mux {
|
||||
pins = "gpio122";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio122";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2s1_sd0_active: i2s1_sd0_active {
|
||||
mux {
|
||||
pins = "gpio122";
|
||||
function = "mi2s2_data0";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio122";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2s1_sd1 {
|
||||
i2s1_sd1_sleep: i2s1_sd1_sleep {
|
||||
mux {
|
||||
pins = "gpio124";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio124";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
i2s1_sd1_active: i2s1_sd1_active {
|
||||
mux {
|
||||
pins = "gpio124";
|
||||
function = "mi2s2_data1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio124";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* WCD reset pin */
|
||||
wcd938x_reset_active: wcd938x_reset_active {
|
||||
mux {
|
||||
pins = "gpio108";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio108";
|
||||
drive-strength = <16>;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
wcd938x_reset_sleep: wcd938x_reset_sleep {
|
||||
mux {
|
||||
pins = "gpio108";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio108";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
@@ -94,3 +94,19 @@
|
||||
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&SILVER_OFF {
|
||||
status = "nok";
|
||||
};
|
||||
|
||||
&GOLD_OFF {
|
||||
status = "nok";
|
||||
};
|
||||
|
||||
&CLUSTER_PWR_DN {
|
||||
status = "nok";
|
||||
};
|
||||
|
||||
&APSS_OFF {
|
||||
status = "nok";
|
||||
};
|
||||
|
||||
134
qcom/kalama.dtsi
134
qcom/kalama.dtsi
@@ -46,6 +46,9 @@
|
||||
compatible = "qcom,kryo";
|
||||
reg = <0x0 0x0>;
|
||||
enable-method = "psci";
|
||||
cpu-idle-states = <&SILVER_OFF>;
|
||||
power-domains = <&CPU_PD0>;
|
||||
power-domain-names = "psci";
|
||||
cpu-release-addr = <0x0 0xE3940000>;
|
||||
next-level-cache = <&L2_0>;
|
||||
L2_0: l2-cache {
|
||||
@@ -65,6 +68,9 @@
|
||||
compatible = "qcom,kryo";
|
||||
reg = <0x0 0x100>;
|
||||
enable-method = "psci";
|
||||
cpu-idle-states = <&SILVER_OFF>;
|
||||
power-domains = <&CPU_PD1>;
|
||||
power-domain-names = "psci";
|
||||
cpu-release-addr = <0x0 0xE3940000>;
|
||||
next-level-cache = <&L2_1>;
|
||||
L2_1: l2-cache {
|
||||
@@ -79,6 +85,9 @@
|
||||
compatible = "qcom,kryo";
|
||||
reg = <0x0 0x200>;
|
||||
enable-method = "psci";
|
||||
cpu-idle-states = <&SILVER_OFF>;
|
||||
power-domains = <&CPU_PD2>;
|
||||
power-domain-names = "psci";
|
||||
cpu-release-addr = <0x0 0xE3940000>;
|
||||
next-level-cache = <&L2_1>;
|
||||
};
|
||||
@@ -88,6 +97,9 @@
|
||||
compatible = "qcom,kryo";
|
||||
reg = <0x0 0x300>;
|
||||
enable-method = "psci";
|
||||
cpu-idle-states = <&GOLD_OFF>;
|
||||
power-domains = <&CPU_PD3>;
|
||||
power-domain-names = "psci";
|
||||
cpu-release-addr = <0x0 0xE3940000>;
|
||||
next-level-cache = <&L2_3>;
|
||||
L2_3: l2-cache {
|
||||
@@ -102,6 +114,9 @@
|
||||
compatible = "qcom,kryo";
|
||||
reg = <0x0 0x400>;
|
||||
enable-method = "psci";
|
||||
cpu-idle-states = <&GOLD_OFF>;
|
||||
power-domains = <&CPU_PD4>;
|
||||
power-domain-names = "psci";
|
||||
cpu-release-addr = <0x0 0xE3940000>;
|
||||
next-level-cache = <&L2_4>;
|
||||
L2_4: l2-cache {
|
||||
@@ -117,6 +132,9 @@
|
||||
compatible = "qcom,kryo";
|
||||
reg = <0x0 0x500>;
|
||||
enable-method = "psci";
|
||||
cpu-idle-states = <&GOLD_OFF>;
|
||||
power-domains = <&CPU_PD5>;
|
||||
power-domain-names = "psci";
|
||||
cpu-release-addr = <0x0 0xE3940000>;
|
||||
next-level-cache = <&L2_5>;
|
||||
L2_5: l2-cache {
|
||||
@@ -131,6 +149,9 @@
|
||||
compatible = "qcom,kryo";
|
||||
reg = <0x0 0x600>;
|
||||
enable-method = "psci";
|
||||
cpu-idle-states = <&GOLD_OFF>;
|
||||
power-domains = <&CPU_PD6>;
|
||||
power-domain-names = "psci";
|
||||
cpu-release-addr = <0x0 0xE3940000>;
|
||||
next-level-cache = <&L2_6>;
|
||||
L2_6: l2-cache {
|
||||
@@ -145,6 +166,9 @@
|
||||
compatible = "qcom,kryo";
|
||||
reg = <0x0 0x700>;
|
||||
enable-method = "psci";
|
||||
cpu-idle-states = <&GOLD_OFF>;
|
||||
power-domains = <&CPU_PD7>;
|
||||
power-domain-names = "psci";
|
||||
cpu-release-addr = <0x0 0xE3940000>;
|
||||
next-level-cache = <&L2_7>;
|
||||
L2_7: l2-cache {
|
||||
@@ -195,6 +219,48 @@
|
||||
};
|
||||
};
|
||||
|
||||
idle-states {
|
||||
entry-method = "psci";
|
||||
|
||||
SILVER_OFF: silver-c4 { /* C4 */
|
||||
compatible = "arm,idle-state";
|
||||
idle-state-name = "rail-pc";
|
||||
entry-latency-us = <800>;
|
||||
exit-latency-us = <750>;
|
||||
min-residency-us = <4090>;
|
||||
arm,psci-suspend-param = <0x40000004>;
|
||||
local-timer-stop;
|
||||
};
|
||||
|
||||
GOLD_OFF: gold-c4 { /* C4 */
|
||||
compatible = "arm,idle-state";
|
||||
idle-state-name = "rail-pc";
|
||||
entry-latency-us = <600>;
|
||||
exit-latency-us = <1550>;
|
||||
min-residency-us = <4791>;
|
||||
arm,psci-suspend-param = <0x40000004>;
|
||||
local-timer-stop;
|
||||
};
|
||||
|
||||
CLUSTER_PWR_DN: cluster-d4 { /* D4 */
|
||||
compatible = "domain-idle-state";
|
||||
idle-state-name = "l3-off";
|
||||
entry-latency-us = <1050>;
|
||||
exit-latency-us = <2500>;
|
||||
min-residency-us = <5309>;
|
||||
arm,psci-suspend-param = <0x41000044>;
|
||||
};
|
||||
|
||||
APSS_OFF: cluster-e3 { /* E3 */
|
||||
compatible = "domain-idle-state";
|
||||
idle-state-name = "llcc-off";
|
||||
entry-latency-us = <2700>;
|
||||
exit-latency-us = <3500>;
|
||||
min-residency-us = <13959>;
|
||||
arm,psci-suspend-param = <0x4100c344>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
soc: soc { };
|
||||
};
|
||||
@@ -481,17 +547,72 @@
|
||||
psci {
|
||||
compatible = "arm,psci-1.0";
|
||||
method = "smc";
|
||||
|
||||
CPU_PD0: cpu-pd0 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
};
|
||||
|
||||
CPU_PD1: cpu-pd1 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
};
|
||||
|
||||
CPU_PD2: cpu-pd2 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
};
|
||||
|
||||
CPU_PD3: cpu-pd3 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
};
|
||||
|
||||
CPU_PD4: cpu-pd4 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
};
|
||||
|
||||
CPU_PD5: cpu-pd5 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
};
|
||||
|
||||
CPU_PD6: cpu-pd6 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
};
|
||||
|
||||
CPU_PD7: cpu-pd7 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
};
|
||||
|
||||
CLUSTER_PD: cluster-pd {
|
||||
#power-domain-cells = <0>;
|
||||
domain-idle-states = <&CLUSTER_PWR_DN &APSS_OFF>;
|
||||
};
|
||||
};
|
||||
|
||||
intc: interrupt-controller@17100000 {
|
||||
compatible = "arm,gic-v3";
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-controller;
|
||||
ranges;
|
||||
#redistributor-regions = <1>;
|
||||
redistributor-stride = <0x0 0x40000>;
|
||||
reg = <0x17100000 0x10000>, /* GICD */
|
||||
<0x17180000 0x200000>; /* GICR * 8 */
|
||||
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
gic_its: msi-controller@17140000 {
|
||||
compatible = "arm,gic-v3-its";
|
||||
msi-controller;
|
||||
#msi-cells = <1>;
|
||||
reg = <0x17140000 0x20000>;
|
||||
};
|
||||
};
|
||||
|
||||
apps_rsc: rsc@17a00000 {
|
||||
@@ -511,6 +632,7 @@
|
||||
<WAKE_TCS 3>,
|
||||
<CONTROL_TCS 0>,
|
||||
<FAST_PATH_TCS 0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
|
||||
apps_bcm_voter: bcm_voter {
|
||||
compatible = "qcom,bcm-voter";
|
||||
@@ -1468,6 +1590,13 @@
|
||||
hwlocks = <&tcsr_mutex 3>;
|
||||
};
|
||||
|
||||
qcom,rmtfs_sharedmem@0 {
|
||||
compatible = "qcom,sharedmem-uio";
|
||||
reg = <0x0 0x280000>;
|
||||
reg-names = "rmtfs";
|
||||
qcom,client-id = <0x00000001>;
|
||||
};
|
||||
|
||||
aoss_qmp: power-controller@c300000 {
|
||||
compatible = "qcom,kalama-aoss-qmp";
|
||||
reg = <0xc300000 0x400>;
|
||||
@@ -1648,6 +1777,11 @@
|
||||
"apss";
|
||||
};
|
||||
|
||||
cluster-device {
|
||||
compatible = "qcom,lpm-cluster-dev";
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
};
|
||||
|
||||
subsystem-sleep-stats@c3f0000 {
|
||||
compatible = "qcom,subsystem-sleep-stats";
|
||||
reg = <0xc3f0000 0x400>;
|
||||
|
||||
@@ -187,7 +187,7 @@
|
||||
qcom,label = <0x0000002>;
|
||||
};
|
||||
|
||||
qrtr-shm {
|
||||
/* qrtr-shm {
|
||||
vdevice-type = "shm-doorbell";
|
||||
generate = "/hypervisor/qrtr-shm";
|
||||
push-compatible = "qcom,qrtr-gunyah-gen";
|
||||
@@ -209,6 +209,7 @@
|
||||
allocate-base;
|
||||
};
|
||||
};
|
||||
*/
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
Reference in New Issue
Block a user