ARM: dts: msm: Rename lx7 and a5 instances for all targets

Rename all instances of "lx7" and "a5" to "icp" except for
compatible prop where "lx7" is changed to "icp_v2" and "a5" is
changed to "icp_v1". Add icp-version tag to determine which icp
version processor to be used. The change affects all relevant DTSI
files. So, they're all compatible with ICP driver changes in dev
branch.

CRs-Fixed: 3162183
Change-Id: I1cf63b727af0bf3c20152ef18ff3698609df68b5
This commit is contained in:
sokchetra eung
2022-04-11 11:59:31 -07:00
committed by Camera Software Integration
parent 5aa593bab1
commit e063a76cc0
11 changed files with 77 additions and 66 deletions

View File

@@ -2493,10 +2493,10 @@
qcom,cam-icp {
compatible = "qcom,cam-icp";
compat-hw-name = "qcom,lx7",
compat-hw-name = "qcom,icp",
"qcom,ipe0",
"qcom,bps";
num-lx7 = <1>;
num-icp = <1>;
num-ipe = <1>;
num-bps = <1>;
status = "ok";
@@ -2505,15 +2505,16 @@
ipe_bps_pc_en;
};
cam_lx7: qcom,lx7 {
cam_icp: qcom,icp {
cell-index = <0>;
compatible = "qcom,cam-lx7";
compatible = "qcom,cam-icp_v2";
icp-version = <0x0200>;
reg = <0xac01000 0x400>,
<0xac01800 0x400>,
<0x0ac04000 0x1000>;
reg-names = "lx7_csr", "lx7_cirq", "lx7_wd0";
reg-names = "icp_csr", "icp_cirq", "icp_wd0";
reg-cam-base = <0x1000 0x1800 0x4000>;
interrupt-names = "lx7";
interrupt-names = "icp";
interrupts = <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>;
regulator-names = "gdsc";
gdsc-supply = <&cam_cc_titan_top_gdsc>;

View File

@@ -1551,10 +1551,10 @@
qcom,cam-icp {
compatible = "qcom,cam-icp";
compat-hw-name = "qcom,a5",
compat-hw-name = "qcom,icp",
"qcom,ipe0",
"qcom,bps";
num-a5 = <1>;
num-icp = <1>;
num-ipe = <1>;
num-bps = <1>;
status = "ok";
@@ -1562,16 +1562,17 @@
ipe_bps_pc_en;
};
cam_a5: qcom,a5 {
cam_icp: qcom,icp {
cell-index = <0>;
compatible = "qcom,cam-a5";
compatible = "qcom,cam-icp_v1";
icp-version = <0x0100>;
reg = <0xac00000 0x6000>,
<0xac10000 0x8000>,
<0xac18000 0x3000>;
reg-names = "a5_qgic", "a5_sierra", "a5_csr";
reg-names = "icp_qgic", "icp_sierra", "icp_csr";
reg-cam-base = <0x00000 0x10000 0x18000>;
interrupts = <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "a5";
interrupt-names = "icp";
regulator-names = "camss-vdd";
camss-vdd-supply = <&cam_cc_titan_top_gdsc>;
clock-names =

View File

@@ -2850,10 +2850,10 @@
qcom,cam-icp {
compatible = "qcom,cam-icp";
compat-hw-name = "qcom,lx7",
compat-hw-name = "qcom,icp",
"qcom,ipe0",
"qcom,bps";
num-lx7 = <1>;
num-icp = <1>;
num-ipe = <1>;
num-bps = <1>;
status = "ok";
@@ -2862,15 +2862,16 @@
ipe_bps_pc_en;
};
cam_lx7: qcom,lx7 {
cam_icp: qcom,icp {
cell-index = <0>;
compatible = "qcom,cam-lx7";
compatible = "qcom,cam-icp_v2";
icp-version = <0x0200>;
reg = <0xac01000 0x400>,
<0xac01800 0x400>,
<0x0ac04000 0x1000>;
reg-names = "lx7_csr", "lx7_cirq", "lx7_wd0";
reg-names = "icp_csr", "icp_cirq", "icp_wd0";
reg-cam-base = <0x1000 0x1800 0x4000>;
interrupt-names = "lx7";
interrupt-names = "icp";
interrupts = <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>;
regulator-names = "gdsc";
gdsc-supply = <&cam_cc_titan_top_gdsc>;

View File

@@ -1529,10 +1529,10 @@
qcom,cam-icp {
compatible = "qcom,cam-icp";
compat-hw-name = "qcom,a5",
compat-hw-name = "qcom,icp",
"qcom,ipe0",
"qcom,bps";
num-a5 = <1>;
num-icp = <1>;
num-ipe = <1>;
num-bps = <1>;
status = "ok";
@@ -1540,16 +1540,17 @@
ipe_bps_pc_en;
};
cam_a5: qcom,a5@ac00000 {
cam_icp: qcom,icp@ac00000 {
cell-index = <0>;
compatible = "qcom,cam-a5";
compatible = "qcom,cam-icp_v1";
icp-version = <0x0100>;
reg = <0xac00000 0x6000>,
<0xac10000 0x8000>,
<0xac18000 0x3000>;
reg-names = "a5_qgic", "a5_sierra", "a5_csr";
reg-names = "icp_qgic", "icp_sierra", "icp_csr";
reg-cam-base = <0x00000 0x10000 0x18000>;
interrupts = <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "a5";
interrupt-names = "icp";
regulator-names = "camss-vdd";
camss-vdd-supply = <&titan_top_gdsc>;
clock-names =

View File

@@ -796,25 +796,26 @@
qcom,cam-icp {
compatible = "qcom,cam-icp";
compat-hw-name = "qcom,a5",
compat-hw-name = "qcom,icp",
"qcom,ipe0",
"qcom,bps";
num-a5 = <1>;
num-icp = <1>;
num-ipe = <1>;
num-bps = <1>;
status = "ok";
};
cam_a5: qcom,a5@ac00000 {
cam_icp: qcom,icp@ac00000 {
cell-index = <0>;
compatible = "qcom,cam-a5";
compatible = "qcom,cam-icp_v1";
icp-version = <0x0100>;
reg = <0xac00000 0x6000>,
<0xac10000 0x8000>,
<0xac18000 0x3000>;
reg-names = "a5_qgic", "a5_sierra", "a5_csr";
reg-names = "icp_qgic", "icp_sierra", "icp_csr";
reg-cam-base = <0x00000 0x10000 0x18000>;
interrupts = <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "a5";
interrupt-names = "icp";
regulator-names = "camss-vdd";
camss-vdd-supply = <&cam_cc_titan_top_gdsc>;
clock-names =

View File

@@ -1744,10 +1744,10 @@
qcom,cam-icp {
compatible = "qcom,cam-icp";
compat-hw-name = "qcom,a5",
compat-hw-name = "qcom,icp",
"qcom,ipe0",
"qcom,bps";
num-a5 = <1>;
num-icp = <1>;
num-ipe = <1>;
num-bps = <1>;
status = "ok";
@@ -1755,16 +1755,17 @@
ipe_bps_pc_en;
};
cam_a5: qcom,a5 {
cam_icp: qcom,icp {
cell-index = <0>;
compatible = "qcom,cam-a5";
compatible = "qcom,cam-icp_v1";
icp-version = <0x0100>;
reg = <0xac00000 0x6000>,
<0xac10000 0x8000>,
<0xac18000 0x3000>;
reg-names = "a5_qgic", "a5_sierra", "a5_csr";
reg-names = "icp_qgic", "icp_sierra", "icp_csr";
reg-cam-base = <0x00000 0x10000 0x18000>;
interrupts = <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "a5";
interrupt-names = "icp";
regulator-names = "camss-vdd";
camss-vdd-supply = <&cam_cc_titan_top_gdsc>;
clock-names =

View File

@@ -755,27 +755,28 @@
qcom,cam-icp {
compatible = "qcom,cam-icp";
compat-hw-name = "qcom,a5",
compat-hw-name = "qcom,icp",
"qcom,ipe0",
"qcom,ipe1",
"qcom,bps";
num-a5 = <1>;
num-icp = <1>;
num-ipe = <2>;
num-bps = <1>;
icp_pc_en;
status = "ok";
};
cam_a5: qcom,a5 {
cam_icp: qcom,icp {
cell-index = <0>;
compatible = "qcom,cam-a5";
compatible = "qcom,cam-icp_v1";
icp-version = <0x0100>;
reg = <0xac00000 0x6000>,
<0xac10000 0x8000>,
<0xac18000 0x3000>;
reg-names = "a5_qgic", "a5_sierra", "a5_csr";
reg-names = "icp_qgic", "icp_sierra", "icp_csr";
reg-cam-base = <0x00000 0x10000 0x18000>;
interrupts = <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "a5";
interrupt-names = "icp";
regulator-names = "camss-vdd";
camss-vdd-supply = <&titan_top_gdsc>;
clock-names =

View File

@@ -1035,10 +1035,10 @@
qcom,cam-icp {
compatible = "qcom,cam-icp";
compat-hw-name = "qcom,lx7",
compat-hw-name = "qcom,icp",
"qcom,ipe0",
"qcom,bps";
num-lx7 = <1>;
num-icp = <1>;
num-ipe = <1>;
num-bps = <1>;
status = "ok";
@@ -1046,15 +1046,16 @@
icp_use_pil;
};
cam_lx7: qcom,lx7 {
cam_icp: qcom,icp {
cell-index = <0>;
compatible = "qcom,cam-lx7";
compatible = "qcom,cam-icp_v2";
icp-version = <0x0200>;
reg = <0xac01000 0x400>,
<0xac01800 0x400>,
<0xac04000 0x1000>;
reg-names = "lx7_csr", "lx7_cirq", "lx7_wd0";
reg-names = "icp_csr", "icp_cirq", "icp_wd0";
reg-cam-base = <0x1000 0x1800 0x4000>;
interrupt-names = "lx7";
interrupt-names = "icp";
interrupts = <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>;
regulator-names = "camss";
camss-supply = <&cam_cc_camss_top_gdsc>;

View File

@@ -1137,10 +1137,10 @@
qcom,cam-icp {
compatible = "qcom,cam-icp";
compat-hw-name = "qcom,a5",
compat-hw-name = "qcom,icp",
"qcom,ipe0",
"qcom,bps";
num-a5 = <1>;
num-icp = <1>;
num-ipe = <1>;
num-bps = <1>;
status = "ok";
@@ -1148,16 +1148,17 @@
ipe_bps_pc_en;
};
cam_a5: qcom,a5 {
cam_icp: qcom,icp {
cell-index = <0>;
compatible = "qcom,cam-a5";
compatible = "qcom,cam-icp_v1";
icp-version = <0x0100>;
reg = <0xac00000 0x6000>,
<0xac10000 0x8000>,
<0xac18000 0x3000>;
reg-names = "a5_qgic", "a5_sierra", "a5_csr";
reg-names = "icp_qgic", "icp_sierra", "icp_csr";
reg-cam-base = <0x00000 0x10000 0x18000>;
interrupts = <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "a5";
interrupt-names = "icp";
regulator-names = "camss-vdd";
camss-vdd-supply = <&cam_cc_titan_top_gdsc>;
clock-names =

View File

@@ -2493,10 +2493,10 @@
qcom,cam-icp {
compatible = "qcom,cam-icp";
compat-hw-name = "qcom,lx7",
compat-hw-name = "qcom,icp",
"qcom,ipe0",
"qcom,bps";
num-lx7 = <1>;
num-icp = <1>;
num-ipe = <1>;
num-bps = <1>;
status = "ok";
@@ -2505,15 +2505,16 @@
ipe_bps_pc_en;
};
cam_lx7: qcom,lx7 {
cam_icp: qcom,icp {
cell-index = <0>;
compatible = "qcom,cam-lx7";
compatible = "qcom,cam-icp_v2";
icp-version = <0x0200>;
reg = <0xac01000 0x400>,
<0xac01800 0x400>,
<0x0ac04000 0x1000>;
reg-names = "lx7_csr", "lx7_cirq", "lx7_wd0";
reg-names = "icp_csr", "icp_cirq", "icp_wd0";
reg-cam-base = <0x1000 0x1800 0x4000>;
interrupt-names = "lx7";
interrupt-names = "icp";
interrupts = <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>;
regulator-names = "gdsc";
gdsc-supply = <&cam_cc_titan_top_gdsc>;

View File

@@ -923,26 +923,27 @@
qcom,cam-icp {
compatible = "qcom,cam-icp";
compat-hw-name = "qcom,a5",
compat-hw-name = "qcom,icp",
"qcom,ipe0",
"qcom,bps";
num-a5 = <1>;
num-icp = <1>;
num-ipe = <1>;
num-bps = <1>;
icp_pc_en;
status = "ok";
};
cam_a5: qcom,a5 {
cam_icp: qcom,icp {
cell-index = <0>;
compatible = "qcom,cam-a5";
compatible = "qcom,cam-icp_v1";
icp-version = <0x0100>;
reg = <0xac00000 0x6000>,
<0xac10000 0x8000>,
<0xac18000 0x3000>;
reg-names = "a5_qgic", "a5_sierra", "a5_csr";
reg-names = "icp_qgic", "icp_sierra", "icp_csr";
reg-cam-base = <0x00000 0x10000 0x18000>;
interrupts = <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "a5";
interrupt-names = "icp";
regulator-names = "camss-vdd";
camss-vdd-supply = <&cam_cc_titan_top_gdsc>;
clock-names =