ARM: dts: msm: add support 120hz dual cphy cmd panel for waipio cdp

Add support waipio dual cphy cmd panel on cdp, dual cphy panel
can be enabled through below commands:
fastboot oem select-display-panel prim:r66451_120hz_fhd_dsc_cmd_cphy
fastboot oem select-display-panel :sec:r66451_sec_120hz_fhd_dsc_cmd_cphy
Also change timing mode order to 120Hz,90Hz,60Hz.

Change-Id: Ib067cf5fca0b532dfc72e56b3fd477979dcc1ef5
This commit is contained in:
Yu Wu
2021-07-22 16:56:56 +08:00
parent 9871943b75
commit e0a251cca2
5 changed files with 25 additions and 12 deletions

View File

@@ -11,6 +11,8 @@
qcom,dsi-ctrl-num = <0>;
qcom,dsi-phy-num = <0>;
qcom,dsi-sec-ctrl-num = <1>;
qcom,dsi-sec-phy-num = <1>;
qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
qcom,mdss-dsi-bllp-eof-power-mode;
@@ -41,7 +43,7 @@
qcom,mdss-dsi-display-timings {
timing@0 {
cell-index = <0>;
qcom,mdss-dsi-panel-framerate = <60>;
qcom,mdss-dsi-panel-framerate = <120>;
qcom,mdss-dsi-panel-width = <1080>;
qcom,mdss-dsi-panel-height = <2340>;
qcom,mdss-dsi-h-front-porch = <96>;
@@ -60,7 +62,7 @@
qcom,mdss-dsi-timing-switch-command = [
39 01 00 00 00 00 02 b0 00
39 01 00 00 00 00 1a c2 09 24 0c 00 00
0c 09 3c 00 09 3c 00 00 00 00 00 00
0c 00 00 00 09 3c 00 00 00 00 00 00
00 00 00 00 00 30 00 6c
];
@@ -119,10 +121,6 @@
39 01 00 00 00 00 05 2b 00 00 09 23
05 01 00 00 78 00 01 11
05 01 00 00 00 00 01 29
39 01 00 00 00 00 02 b0 00
39 01 00 00 00 00 1a c2 09 24 0c 00 00
0c 09 3c 00 09 3c 00 00 00 00 00 00
00 00 00 00 00 30 00 6c
];
qcom,mdss-dsi-off-command = [
@@ -243,7 +241,7 @@
timing@2 {
cell-index = <2>;
qcom,mdss-dsi-panel-framerate = <120>;
qcom,mdss-dsi-panel-framerate = <60>;
qcom,mdss-dsi-panel-width = <1080>;
qcom,mdss-dsi-panel-height = <2340>;
qcom,mdss-dsi-h-front-porch = <96>;
@@ -262,7 +260,7 @@
qcom,mdss-dsi-timing-switch-command = [
39 01 00 00 00 00 02 b0 00
39 01 00 00 00 00 1a c2 09 24 0c 00 00
0c 00 00 00 09 3c 00 00 00 00 00 00
0c 09 3c 00 09 3c 00 00 00 00 00 00
00 00 00 00 00 30 00 6c
];
@@ -321,6 +319,10 @@
39 01 00 00 00 00 05 2b 00 00 09 23
05 01 00 00 78 00 01 11
05 01 00 00 00 00 01 29
39 01 00 00 00 00 02 b0 00
39 01 00 00 00 00 1a c2 09 24 0c 00 00
0c 09 3c 00 09 3c 00 00 00 00 00 00
00 00 00 00 00 30 00 6c
];
qcom,mdss-dsi-off-command = [

View File

@@ -22,12 +22,15 @@
&dsi_r66451_amoled_120hz_cmd_cphy {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <255>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 0 0>;
qcom,platform-sec-reset-gpio = <&tlmm 4 0>;
};
&dsi_r66451_amoled_cmd {

9
display/waipio-sde-display-common.dtsi Executable file → Normal file
View File

@@ -322,10 +322,11 @@
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 1d 13 03
19 02 02 04 00 00 00];
qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 20 1b 05
19 06 02 04 00 00 00];
qcom,display-topology = <2 2 1>;
qcom,default-topology-index = <0>;
};
@@ -338,8 +339,8 @@
};
timing@2 {
qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 20 1b 05
19 06 02 04 00 00 00];
qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 1d 13 03
19 02 02 04 00 00 00];
qcom,display-topology = <2 2 1>;
qcom,default-topology-index = <0>;
};

View File

@@ -20,11 +20,15 @@
&dsi_r66451_amoled_120hz_cmd_cphy {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <255>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 0 0>;
qcom,platform-sec-reset-gpio = <&tlmm 4 0>;
};
&dsi_r66451_amoled_cmd {

View File

@@ -223,12 +223,15 @@
&dsi_r66451_amoled_120hz_cmd_cphy {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply_sim>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <1>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <255>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 0 0>;
qcom,platform-sec-reset-gpio = <&tlmm 4 0>;
};
&qupv3_se4_spi {