ARM: dts: msm: Describe the QTB devices for Kalama's IOMMUs

Describe the register spaces and properties for the QTBs of Kalama's
IOMMUs.

Change-Id: Iff94c8a1965faab593ad0aefe952e1929bd383fb
This commit is contained in:
Isaac J. Manjarres
2021-06-22 15:32:16 -07:00
parent 47082bfcc0
commit e9b0b4b90e

View File

@@ -57,6 +57,15 @@
<GIC_SPI 668 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 669 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 699 IRQ_TYPE_LEVEL_HIGH>;
gpu_qtb: gpu_qtb@3de8000 {
compatible = "qcom,qsmmuv500-tbu", "qcom,qtb500";
reg = <0x3de8000 0x1000>;
qcom,stream-id-range = <0x0 0x400>;
qcom,iova-width = <49>;
interconnects = <&gem_noc MASTER_GPU_TCU &mc_virt SLAVE_EBI1>;
qcom,num-qtb-ports = <2>;
};
};
apps_smmu: apps-smmu@15000000 {
@@ -238,6 +247,78 @@
<0x1943 0x0000 0x00000103>,
<0x1944 0x0000 0x00000103>,
<0x1947 0x0000 0x00000103>;
anoc_1_qtb: anoc_1_qtb@16f0000 {
compatible = "qcom,qsmmuv500-tbu", "qcom,qtb500";
reg = <0x16f0000 0x1000>;
qcom,stream-id-range = <0x0 0x400>;
qcom,iova-width = <36>;
interconnects = <&system_noc MASTER_A1NOC_SNOC &mc_virt SLAVE_EBI1>;
qcom,num-qtb-ports = <1>;
};
anoc_2_qtb: anoc_2_qtb@171a000 {
compatible = "qcom,qsmmuv500-tbu", "qcom,qtb500";
reg = <0x171a000 0x1000>;
qcom,stream-id-range = <0x400 0x400>;
qcom,iova-width = <36>;
interconnects = <&system_noc MASTER_A2NOC_SNOC &mc_virt SLAVE_EBI1>;
qcom,num-qtb-ports = <1>;
};
cam_hf_qtb: cam_hf_qtb@17d2000 {
compatible = "qcom,qsmmuv500-tbu", "qcom,qtb500";
reg = <0x17d2000 0x1000>;
qcom,stream-id-range = <0x800 0x400>;
qcom,iova-width = <36>;
interconnects = <&mmss_noc MASTER_CAMNOC_HF &mc_virt SLAVE_EBI1>;
qcom,num-qtb-ports = <2>;
};
nsp_qtb: nsp_qtb@523000 {
compatible = "qcom,qsmmuv500-tbu", "qcom,qtb500";
reg = <0x523000 0x1000>;
qcom,stream-id-range = <0xc00 0x400>;
qcom,iova-width = <34>;
interconnects = <&nsp_noc MASTER_CDSP_PROC &mc_virt SLAVE_EBI1>;
qcom,num-qtb-ports = <2>;
};
lpass_qtb: lpass_qtb@503000 {
compatible = "qcom,qsmmuv500-tbu", "qcom,qtb500";
reg = <0x503000 0x1000>;
qcom,stream-id-range = <0x1000 0x400>;
qcom,iova-width = <32>;
interconnects = <&lpass_lpicx_noc MASTER_LPASS_PROC &mc_virt SLAVE_EBI1>;
qcom,num-qtb-ports = <1>;
};
pcie_qtb: pcie_qtb@16cd000 {
compatible = "qcom,qsmmuv500-tbu", "qcom,qtb500";
reg = <0x16cd000 0x1000>;
qcom,stream-id-range = <0x1400 0x400>;
qcom,iova-width = <36>;
interconnects = <&pcie_noc MASTER_PCIE_0 &mc_virt SLAVE_EBI1>;
qcom,num-qtb-ports = <1>;
};
sf_qtb: sf_qtb@17d1000 {
compatible = "qcom,qsmmuv500-tbu", "qcom,qtb500";
reg = <0x17d1000 0x1000>;
qcom,stream-id-range = <0x1800 0x400>;
qcom,iova-width = <36>;
interconnects = <&mmss_noc MASTER_VIDEO &mc_virt SLAVE_EBI1>;
qcom,num-qtb-ports = <2>;
};
mdp_hf_qtb: mdp_hf_qtb@17d0000 {
compatible = "qcom,qsmmuv500-tbu", "qcom,qtb500";
reg = <0x17d0000 0x1000>;
qcom,stream-id-range = <0x1c00 0x400>;
qcom,iova-width = <32>;
interconnects = <&mmss_noc MASTER_MDP &mc_virt SLAVE_EBI1>;
qcom,num-qtb-ports = <2>;
};
};
dma_dev {