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https://github.com/Evolution-X-Devices/kernel_oneplus_sm8550-devicetrees
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ARM: dts: msm: add truly fhd split link panel on Waipio
Change adds Truly split link FHD panel for Waipio target. Change-Id: Ie8f3aae8ed71c458d5107175d3829b1f8d5a35cb
This commit is contained in:
190
display/dsi-panel-nt35695b-truly-fhd-splitlink-cmd.dtsi
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190
display/dsi-panel-nt35695b-truly-fhd-splitlink-cmd.dtsi
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@@ -0,0 +1,190 @@
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&mdss_mdp {
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dsi_nt35695b_truly_fhd_sl_cmd: qcom,mdss_dsi_nt35695b_truly_fhd_sl_cmd {
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qcom,mdss-dsi-panel-name =
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"nt35695b truly fhd command mode split link dsi panel";
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qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
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qcom,dsi-ctrl-num = <0>;
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qcom,dsi-phy-num = <0>;
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qcom,mdss-dsi-virtual-channel-id = <0>;
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qcom,mdss-dsi-stream = <0>;
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qcom,mdss-dsi-bpp = <24>;
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qcom,mdss-dsi-underflow-color = <0xff>;
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qcom,mdss-dsi-border-color = <0>;
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qcom,mdss-dsi-traffic-mode = "burst_mode";
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qcom,mdss-dsi-te-pin-select = <1>;
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qcom,mdss-dsi-te-dcs-command = <1>;
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qcom,mdss-dsi-te-check-enable;
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qcom,mdss-dsi-te-using-te-pin;
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qcom,mdss-dsi-bllp-eof-power-mode;
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qcom,mdss-dsi-bllp-power-mode;
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qcom,mdss-dsi-lane-0-state;
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qcom,mdss-dsi-lane-1-state;
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qcom,mdss-dsi-lane-2-state;
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qcom,mdss-dsi-lane-3-state;
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qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
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qcom,mdss-dsi-tx-eot-append;
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qcom,mdss-dsi-post-init-delay = <1>;
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qcom,mdss-dsi-dma-trigger = "trigger_sw";
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qcom,mdss-dsi-mdp-trigger = "none";
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qcom,split-link-enabled;
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qcom,sublinks-count = <2>;
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qcom,lanes-per-sublink = <2>;
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qcom,mdss-dsi-display-timings {
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timing@0 {
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qcom,mdss-dsi-panel-width = <1080>;
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qcom,mdss-dsi-panel-height = <1920>;
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qcom,mdss-dsi-h-front-porch = <120>;
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qcom,mdss-dsi-h-back-porch = <60>;
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qcom,mdss-dsi-h-pulse-width = <12>;
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qcom,mdss-dsi-h-sync-skew = <0>;
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qcom,mdss-dsi-v-back-porch = <2>;
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qcom,mdss-dsi-v-front-porch = <12>;
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qcom,mdss-dsi-v-pulse-width = <2>;
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qcom,mdss-dsi-h-sync-pulse = <0>;
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qcom,mdss-dsi-h-left-border = <0>;
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qcom,mdss-dsi-h-right-border = <0>;
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qcom,mdss-dsi-v-top-border = <0>;
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qcom,mdss-dsi-v-bottom-border = <0>;
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qcom,mdss-dsi-panel-framerate = <60>;
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qcom,mdss-dsi-on-command =
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[
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/* Select no of lanes to 2 */
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15 01 00 00 00 00 02 FF 10
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15 01 00 00 00 00 02 fb 01
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15 01 00 00 00 00 02 ba 01
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/* Init sequence for FHD */
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15 01 00 00 10 00 02 ff 20
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15 01 00 00 00 00 02 fb 01
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15 01 00 00 00 00 02 00 01
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15 01 00 00 00 00 02 01 55
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15 01 00 00 00 00 02 02 45
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15 01 00 00 00 00 02 03 55
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15 01 00 00 00 00 02 05 50
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15 01 00 00 00 00 02 06 a8
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15 01 00 00 00 00 02 07 ad
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15 01 00 00 00 00 02 08 0c
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15 01 00 00 00 00 02 0b aa
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15 01 00 00 00 00 02 0c aa
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15 01 00 00 00 00 02 0e b0
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15 01 00 00 00 00 02 0f b3
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15 01 00 00 00 00 02 11 28
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15 01 00 00 00 00 02 12 10
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15 01 00 00 00 00 02 13 01
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15 01 00 00 00 00 02 14 4a
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15 01 00 00 00 00 02 15 12
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15 01 00 00 00 00 02 16 12
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15 01 00 00 00 00 02 30 01
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15 01 00 00 00 00 02 72 11
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15 01 00 00 00 00 02 58 82
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15 01 00 00 00 00 02 59 00
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15 01 00 00 00 00 02 5a 02
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15 01 00 00 00 00 02 5b 00
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15 01 00 00 00 00 02 5c 82
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15 01 00 00 00 00 02 5d 80
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15 01 00 00 00 00 02 5e 02
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15 01 00 00 00 00 02 5f 00
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15 01 00 00 00 00 02 ff 24
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15 01 00 00 00 00 02 fb 01
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15 01 00 00 00 00 02 00 01
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15 01 00 00 00 00 02 01 0b
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15 01 00 00 00 00 02 02 0c
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15 01 00 00 00 00 02 03 89
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15 01 00 00 00 00 02 04 8a
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15 01 00 00 00 00 02 05 0f
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15 01 00 00 00 00 02 06 10
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15 01 00 00 00 00 02 07 10
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15 01 00 00 00 00 02 08 1c
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15 01 00 00 00 00 02 09 00
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15 01 00 00 00 00 02 0a 00
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15 01 00 00 00 00 02 0b 00
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15 01 00 00 00 00 02 0c 00
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15 01 00 00 00 00 02 0d 13
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15 01 00 00 00 00 02 0e 15
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15 01 00 00 00 00 02 0f 17
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15 01 00 00 00 00 02 10 01
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15 01 00 00 00 00 02 11 0b
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15 01 00 00 00 00 02 12 0c
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15 01 00 00 00 00 02 13 89
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15 01 00 00 00 00 02 14 8a
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15 01 00 00 00 00 02 15 0f
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15 01 00 00 00 00 02 16 10
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15 01 00 00 00 00 02 17 10
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15 01 00 00 00 00 02 18 1c
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15 01 00 00 00 00 02 19 00
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15 01 00 00 00 00 02 1a 00
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15 01 00 00 00 00 02 1b 00
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15 01 00 00 00 00 02 1c 00
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15 01 00 00 00 00 02 1d 13
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15 01 00 00 00 00 02 1e 15
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15 01 00 00 00 00 02 1f 17
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15 01 00 00 00 00 02 20 00
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15 01 00 00 00 00 02 21 01
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15 01 00 00 00 00 02 22 00
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15 01 00 00 00 00 02 23 40
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15 01 00 00 00 00 02 24 40
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15 01 00 00 00 00 02 25 6d
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15 01 00 00 00 00 02 26 40
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15 01 00 00 00 00 02 27 40
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15 01 00 00 00 00 02 29 d8
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15 01 00 00 00 00 02 2a 2a
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15 01 00 00 00 00 02 4b 03
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15 01 00 00 00 00 02 4c 11
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15 01 00 00 00 00 02 4d 10
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15 01 00 00 00 00 02 4e 01
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15 01 00 00 00 00 02 4f 01
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15 01 00 00 00 00 02 50 10
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15 01 00 00 00 00 02 51 00
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15 01 00 00 00 00 02 52 80
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15 01 00 00 00 00 02 53 00
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15 01 00 00 00 00 02 54 07
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15 01 00 00 00 00 02 55 25
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15 01 00 00 00 00 02 56 00
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15 01 00 00 00 00 02 58 07
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15 01 00 00 00 00 02 5b 43
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15 01 00 00 00 00 02 5c 00
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15 01 00 00 00 00 02 5f 73
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15 01 00 00 00 00 02 60 73
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15 01 00 00 00 00 02 63 22
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15 01 00 00 00 00 02 64 00
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15 01 00 00 00 00 02 67 08
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15 01 00 00 00 00 02 68 04
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15 01 00 00 00 00 02 7a 80
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15 01 00 00 00 00 02 7b 91
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15 01 00 00 00 00 02 7c d8
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15 01 00 00 00 00 02 7d 60
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15 01 00 00 00 00 02 93 06
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15 01 00 00 00 00 02 94 06
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15 01 00 00 00 00 02 8a 00
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15 01 00 00 00 00 02 9b 0f
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15 01 00 00 00 00 02 b3 c0
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15 01 00 00 00 00 02 b4 00
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15 01 00 00 00 00 02 b5 00
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15 01 00 00 00 00 02 b6 21
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15 01 00 00 00 00 02 b7 22
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15 01 00 00 00 00 02 b8 07
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15 01 00 00 00 00 02 b9 07
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15 01 00 00 00 00 02 ba 22
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15 01 00 00 00 00 02 bd 20
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15 01 00 00 00 00 02 be 07
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15 01 00 00 00 00 02 bf 07
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15 01 00 00 00 00 02 c1 6d
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15 01 00 00 00 00 02 c4 24
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15 01 00 00 00 00 02 e3 00
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15 01 00 00 00 00 02 ec 00
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15 01 00 00 00 00 02 ff 10
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15 01 00 00 00 00 02 bb 10
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15 01 00 00 00 00 02 35 00
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05 01 00 00 78 00 02 11 00
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05 01 00 00 78 00 02 29 00];
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qcom,mdss-dsi-off-command = [05 01 00 00 14
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00 02 28 00 05 01 00 00 78 00 02 10 00];
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qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
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qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
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};
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};
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};
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};
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@@ -164,6 +164,14 @@
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_nt35695b_truly_fhd_sl_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_avdd>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,platform-reset-gpio = <&tlmm 0 0>;
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};
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&dsi_sim_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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@@ -31,6 +31,7 @@
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#include "dsi-panel-sim-vdc-vid.dtsi"
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#include "dsi-panel-sim-vdc-cmd.dtsi"
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#include "dsi-panel-nt35597-truly-dualmipi-wqxga-splitlink-cmd.dtsi"
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#include "dsi-panel-nt35695b-truly-fhd-splitlink-cmd.dtsi"
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#include "waipio-sde-display-pinctrl.dtsi"
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@@ -201,6 +202,20 @@
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};
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};
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&dsi_nt35695b_truly_fhd_sl_cmd {
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qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
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qcom,mdss-dsi-display-timings {
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timing@0 {
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/* DPHY regular margins */
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qcom,mdss-dsi-panel-phy-timings = [00 1b 07 06 22 21 07
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07 07 02 04 00 18 16];
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qcom,display-topology = <2 0 1>;
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qcom,default-topology-index = <0>;
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};
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};
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};
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&dsi_r66451_amoled_cmd {
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qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
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qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
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@@ -45,6 +45,13 @@
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qcom,mdss-dsi-bl-max-level = <4095>;
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};
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&dsi_nt35695b_truly_fhd_sl_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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};
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&dsi_r66451_amoled_video {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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@@ -109,6 +109,13 @@
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qcom,mdss-dsi-bl-max-level = <4095>;
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};
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&dsi_nt35695b_truly_fhd_sl_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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};
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&L1D {
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qcom,init-voltage = <1200000>; /* panel ext vdd */
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};
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@@ -152,6 +152,10 @@
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qcom,ulps-enabled;
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};
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&dsi_nt35695b_truly_fhd_sl_cmd {
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qcom,ulps-enabled;
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};
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&dsi_sharp_qsync_wqhd_cmd {
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qcom,ulps-enabled;
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qcom,mdss-dsi-display-timings {
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