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https://github.com/Evolution-X-Devices/kernel_oneplus_sm8550-devicetrees
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ARM: dts: msm: add SPMI PMIC arbiter and PMIC devices for lemans
Add an SPMI PMIC arbiter device so that it is possible to communicate with PMICs attached to the SPMI bus and also add top level slave devices and their peripherals. Change-Id: I15afa13ed9edfd455c1594ada1a80748d844c149
This commit is contained in:
@@ -1,3 +1,5 @@
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#include "lemans-pmic-overlay.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. Lemans ADP";
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compatible = "qcom,lemans", "qcom,adp";
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211
qcom/lemans-pmic-overlay.dtsi
Normal file
211
qcom/lemans-pmic-overlay.dtsi
Normal file
@@ -0,0 +1,211 @@
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#include "pm8775.dtsi"
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&pm8775_1 {
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/delete-node/ pon_pbs@800;
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/delete-node/ pon_hlos@1200;
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pon_hlos@1200 {
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compatible = "qcom,pm8998-pon";
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reg = <0x1200>, <0x800>;
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reg-names = "pon_hlos", "pon_pbs";
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pwrkey {
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compatible = "qcom,pmk8350-pwrkey";
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interrupts = <0x0 0x12 0x7 IRQ_TYPE_EDGE_BOTH>;
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linux,code = <KEY_POWER>;
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};
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resin {
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compatible = "qcom,pmk8350-resin";
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interrupts = <0x0 0x12 0x6 IRQ_TYPE_EDGE_BOTH>;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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};
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&pm8775_2 {
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/delete-node/ pon_pbs@800;
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/delete-node/ pon_hlos@1200;
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pon_hlos@1200 {
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compatible = "qcom,pm8998-pon";
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reg = <0x1200>, <0x800>;
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reg-names = "pon_hlos", "pon_pbs";
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pwrkey {
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compatible = "qcom,pmk8350-pwrkey";
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interrupts = <0x2 0x12 0x7 IRQ_TYPE_EDGE_BOTH>;
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linux,code = <KEY_POWER>;
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};
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resin {
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compatible = "qcom,pmk8350-resin";
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interrupts = <0x2 0x12 0x6 IRQ_TYPE_EDGE_BOTH>;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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};
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&pm8775_3 {
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/delete-node/ pon_pbs@800;
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/delete-node/ pon_hlos@1200;
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pon_hlos@1200 {
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compatible = "qcom,pm8998-pon";
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reg = <0x1200>, <0x800>;
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reg-names = "pon_hlos", "pon_pbs";
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pwrkey {
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compatible = "qcom,pmk8350-pwrkey";
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interrupts = <0x4 0x12 0x7 IRQ_TYPE_EDGE_BOTH>;
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linux,code = <KEY_POWER>;
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};
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resin {
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compatible = "qcom,pmk8350-resin";
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interrupts = <0x4 0x12 0x6 IRQ_TYPE_EDGE_BOTH>;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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};
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&pm8775_4 {
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/delete-node/ pon_pbs@800;
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/delete-node/ pon_hlos@1200;
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pon_hlos@1200 {
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compatible = "qcom,pm8998-pon";
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reg = <0x1200>, <0x800>;
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reg-names = "pon_hlos", "pon_pbs";
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pwrkey {
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compatible = "qcom,pmk8350-pwrkey";
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interrupts = <0x6 0x12 0x7 IRQ_TYPE_EDGE_BOTH>;
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linux,code = <KEY_POWER>;
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};
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resin {
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compatible = "qcom,pmk8350-resin";
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interrupts = <0x6 0x12 0x6 IRQ_TYPE_EDGE_BOTH>;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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};
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&soc {
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pmic-pon-log {
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compatible = "qcom,pmic-pon-log";
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nvmem = <&pm8775_1_sdam_5>;
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nvmem-names = "pon_log";
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};
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};
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&thermal_zones {
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pm8775_1_temp_alarm: pm8775_1_tz {
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polling-delay-passive = <100>;
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polling-delay = <0>;
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thermal-governor = "step_wise";
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thermal-sensors = <&pm8775_1_tz>;
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trips {
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pm8775_1_trip0: trip0 {
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temperature = <105000>;
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hysteresis = <0>;
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type = "passive";
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};
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pm8775_1_trip1: trip1 {
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temperature = <125000>;
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hysteresis = <0>;
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type = "passive";
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};
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pm8775_1_trip2: trip2 {
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temperature = <155000>;
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hysteresis = <0>;
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type = "critical";
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};
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};
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};
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pm8775_2_temp_alarm: pm8775_2_tz {
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polling-delay-passive = <100>;
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polling-delay = <0>;
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thermal-governor = "step_wise";
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thermal-sensors = <&pm8775_2_tz>;
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trips {
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pm8775_2_trip0: trip0 {
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temperature = <105000>;
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hysteresis = <0>;
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type = "passive";
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};
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pm8775_2_trip1: trip1 {
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temperature = <125000>;
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hysteresis = <0>;
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type = "passive";
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};
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pm8775_2_trip2: trip2 {
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temperature = <155000>;
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hysteresis = <0>;
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type = "critical";
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};
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};
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};
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pm8775_3_temp_alarm: pm8775_3_tz {
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polling-delay-passive = <100>;
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polling-delay = <0>;
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thermal-governor = "step_wise";
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thermal-sensors = <&pm8775_3_tz>;
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trips {
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pm8775_3_trip0: trip0 {
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temperature = <105000>;
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hysteresis = <0>;
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type = "passive";
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};
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pm8775_3_trip1: trip1 {
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temperature = <125000>;
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hysteresis = <0>;
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type = "passive";
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};
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pm8775_3_trip2: trip2 {
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temperature = <155000>;
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hysteresis = <0>;
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type = "critical";
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};
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};
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};
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pm8775_4_temp_alarm: pm8775_4_tz {
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polling-delay-passive = <100>;
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polling-delay = <0>;
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thermal-governor = "step_wise";
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thermal-sensors = <&pm8775_4_tz>;
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trips {
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pm8775_4_trip0: trip0 {
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temperature = <105000>;
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hysteresis = <0>;
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type = "passive";
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};
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pm8775_4_trip1: trip1 {
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temperature = <125000>;
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hysteresis = <0>;
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type = "passive";
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};
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pm8775_4_trip2: trip2 {
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temperature = <155000>;
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hysteresis = <0>;
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type = "critical";
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};
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};
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};
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};
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@@ -957,6 +957,28 @@
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vendor_hooks: qcom,cpu-vendor-hooks {
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compatible = "qcom,cpu-vendor-hooks";
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};
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spmi_bus: qcom,spmi@c440000 {
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compatible = "qcom,spmi-pmic-arb";
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reg = <0xc440000 0x1100>,
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<0xc600000 0x2000000>,
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<0xe600000 0x100000>,
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<0xe700000 0xa0000>,
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<0xc40a000 0x26000>;
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reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
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interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "periph_irq";
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interrupt-controller;
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#interrupt-cells = <4>;
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#address-cells = <2>;
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#size-cells = <0>;
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cell-index = <0>;
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qcom,channel = <0>;
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qcom,ee = <0>;
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};
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thermal_zones: thermal-zones {
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};
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};
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#include "lemans-4pmic-regulators.dtsi"
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233
qcom/pm8775.dtsi
Normal file
233
qcom/pm8775.dtsi
Normal file
@@ -0,0 +1,233 @@
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/input/qcom,qpnp-power-on.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/spmi/spmi.h>
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&spmi_bus {
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#address-cells = <2>;
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#size-cells = <0>;
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interrupt-controller;
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#interrupt-cells = <4>;
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pm8775_1: qcom,pm8775@0 {
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compatible = "qcom,spmi-pmic";
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reg = <0 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pm8775_1_tz: qcom,temp-alarm@a00 {
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compatible = "qcom,spmi-temp-alarm";
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reg = <0xa00>;
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interrupts = <0x0 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
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#thermal-sensor-cells = <0>;
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};
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pon_pbs@800 {
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compatible = "qcom,qpnp-power-on";
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reg = <0x800>;
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qcom,system-reset;
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qcom,store-hard-reset-reason;
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};
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pon_hlos@1200 {
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compatible = "qcom,qpnp-power-on";
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reg = <0x1200>, <0x800>;
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reg-names = "pon_hlos", "pon_pbs";
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interrupts = <0x0 0x12 0x7 IRQ_TYPE_EDGE_BOTH>,
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<0x0 0x12 0x6 IRQ_TYPE_EDGE_BOTH>;
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interrupt-names = "kpdpwr", "resin";
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qcom,kpdpwr-sw-debounce;
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qcom,pon_1 {
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qcom,pon-type = <PON_POWER_ON_TYPE_KPDPWR>;
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linux,code = <KEY_POWER>;
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};
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qcom,pon_2 {
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qcom,pon-type = <PON_POWER_ON_TYPE_RESIN>;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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pm8775_1_clkdiv: clock-controller@5700 {
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compatible = "qcom,spmi-clkdiv";
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reg = <0x5700>;
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#clock-cells = <1>;
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qcom,num-clkdivs = <2>;
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clock-output-names = "pm8775_1_div_clk1",
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"pm8775_1_div_clk2";
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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};
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pm8775_1_rtc: qcom,pm8775_1_rtc {
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compatible = "qcom,pmk8350-rtc";
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reg = <0x6100>, <0x6200>;
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reg-names = "rtc", "alarm";
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interrupts = <0x0 0x62 0x1 IRQ_TYPE_NONE>;
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};
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pm8775_1_gpios: pinctrl@8800 {
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compatible = "qcom,pm8775-gpio";
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reg = <0x8800>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pm8775_1_sdam_2: sdam@7100 {
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compatible = "qcom,spmi-sdam";
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reg = <0x7100>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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pm8775_1_sdam_5: sdam@7400 {
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compatible = "qcom,spmi-sdam";
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reg = <0x7400>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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/* below definitions are for the second instance of pm8775 */
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pm8775_2: qcom,pm8775@2 {
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compatible = "qcom,spmi-pmic";
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reg = <2 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pm8775_2_tz: qcom,temp-alarm@a00 {
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compatible = "qcom,spmi-temp-alarm";
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reg = <0xa00>;
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interrupts = <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
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#thermal-sensor-cells = <0>;
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};
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pon_pbs@800 {
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compatible = "qcom,qpnp-power-on";
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reg = <0x800>;
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};
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pon_hlos@1200 {
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compatible = "qcom,qpnp-power-on";
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reg = <0x1200>, <0x800>;
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reg-names = "pon_hlos", "pon_pbs";
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};
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pm8775_2_clkdiv: clock-controller@5700 {
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compatible = "qcom,spmi-clkdiv";
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reg = <0x5700>;
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#clock-cells = <1>;
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qcom,num-clkdivs = <2>;
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clock-output-names = "pm8775_2_div_clk1",
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"pm8775_2_div_clk2";
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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};
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pm8775_2_gpios: pinctrl@8800 {
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compatible = "qcom,pm8775-gpio";
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reg = <0x8800>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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/* below definitions are for the third instance of pm8775 */
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pm8775_3: qcom,pm8775@4 {
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compatible = "qcom,spmi-pmic";
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reg = <4 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pm8775_3_tz: qcom,temp-alarm@a00 {
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compatible = "qcom,spmi-temp-alarm";
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reg = <0xa00>;
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interrupts = <0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
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#thermal-sensor-cells = <0>;
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};
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pon_pbs@800 {
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compatible = "qcom,qpnp-power-on";
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reg = <0x800>;
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};
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pon_hlos@1200 {
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compatible = "qcom,qpnp-power-on";
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reg = <0x1200>, <0x800>;
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reg-names = "pon_hlos", "pon_pbs";
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};
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pm8775_3_clkdiv: clock-controller@5700 {
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compatible = "qcom,spmi-clkdiv";
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reg = <0x5700>;
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#clock-cells = <1>;
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qcom,num-clkdivs = <2>;
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clock-output-names = "pm8775_3_div_clk1",
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"pm8775_3_div_clk2";
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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};
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pm8775_3_gpios: pinctrl@8800 {
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compatible = "qcom,pm8775-gpio";
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reg = <0x8800>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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/* below definitions are for the fourth instance of pm8775 */
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pm8775_4: qcom,pm8775@6 {
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compatible = "qcom,spmi-pmic";
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reg = <6 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pm8775_4_tz: qcom,temp-alarm@a00 {
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compatible = "qcom,spmi-temp-alarm";
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reg = <0xa00>;
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interrupts = <0x6 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
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#thermal-sensor-cells = <0>;
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};
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pon_pbs@800 {
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compatible = "qcom,qpnp-power-on";
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reg = <0x800>;
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};
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pon_hlos@1200 {
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compatible = "qcom,qpnp-power-on";
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reg = <0x1200>, <0x800>;
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reg-names = "pon_hlos", "pon_pbs";
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};
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pm8775_4_clkdiv: clock-controller@5700 {
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compatible = "qcom,spmi-clkdiv";
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reg = <0x5700>;
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#clock-cells = <1>;
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qcom,num-clkdivs = <2>;
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clock-output-names = "pm8775_4_div_clk1",
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"pm8775_4_div_clk2";
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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};
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pm8775_4_gpios: pinctrl@8800 {
|
||||
compatible = "qcom,pm8775-gpio";
|
||||
reg = <0x8800>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user