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https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
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ARM: dts: msm: Add platform changes for ravelin ufs
Add platform specific dt changes of UFS for ravelin. Change-Id: Idc92d001ceb4e2a44e64530b9760600a16ffcd9c
This commit is contained in:
@@ -88,3 +88,58 @@
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pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
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};
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};
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&ufsphy_mem {
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/*
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* Here parrot phy is used for ravelin as it
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* do not have its own list for module load and
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* hence compatible is using parrot.
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* We have plan to improve this by making phy binary
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* target independent.
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*/
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compatible = "qcom,ufs-phy-qmp-v4-parrot";
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vdda-phy-supply = <&L5B>;
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vdda-pll-supply = <&L16B>;
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vdda-phy-max-microamp = <88530>;
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vdda-pll-max-microamp = <18310>;
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status = "ok";
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};
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&ufshc_mem {
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vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
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vcc-supply = <&L5E>;
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vcc-max-microamp = <1056000>;
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vccq-supply = <&L13B>;
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vccq-max-microamp = <750000>;
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vccq2-supply = <&L19B>;
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vccq2-max-microamp = <750000>;
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qcom,vddp-ref-clk-supply = <&L13B>;
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qcom,vddp-ref-clk-max-microamp = <100>;
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/*
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* ufs-dev-types and nvmem entries are for ufs device
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* identification using nvmem interface. Use number of
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* ufs devices supported for ufs-dev-types, and nvmem handle
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* added by pmic for sdam register.
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*
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* Default value taken by driver is bit[0] = 0 for 3.x and
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* bit[0] = 1 for 2.x driver code takes this as default case.
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*
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* But Bit value to identify ufs device is not consistent
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* across the targets it could be bit[0] = 0/1 for UFS2.x/3x
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* and vice versa. If the bit[0] value is not same as default
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* value used in driver and if its reverted then use flag
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* qcom,ufs-dev-revert to identify ufs device.
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*/
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ufs-dev-types = <2>;
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qcom,ufs-dev-revert;
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nvmem-cells = <&ufs_dev>, <&boot_config>;
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nvmem-cell-names = "ufs_dev", "boot_conf";
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status = "ok";
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};
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@@ -131,3 +131,58 @@
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pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
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};
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};
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&ufsphy_mem {
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/*
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* Here parrot phy is used for ravelin as it
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* do not have its own list for module load and
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* hence compatible is using parrot.
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* We have plan to improve this by making phy binary
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* target independent.
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*/
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compatible = "qcom,ufs-phy-qmp-v4-parrot";
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vdda-phy-supply = <&L5B>;
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vdda-pll-supply = <&L16B>;
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vdda-phy-max-microamp = <88530>;
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vdda-pll-max-microamp = <18310>;
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status = "ok";
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};
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&ufshc_mem {
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vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
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vcc-supply = <&L5E>;
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vcc-max-microamp = <1056000>;
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vccq-supply = <&L13B>;
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vccq-max-microamp = <750000>;
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vccq2-supply = <&L19B>;
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vccq2-max-microamp = <750000>;
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qcom,vddp-ref-clk-supply = <&L13B>;
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qcom,vddp-ref-clk-max-microamp = <100>;
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/*
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* ufs-dev-types and nvmem entries are for ufs device
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* identification using nvmem interface. Use number of
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* ufs devices supported for ufs-dev-types, and nvmem handle
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* added by pmic for sdam register.
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*
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* Default value taken by driver is bit[0] = 0 for 3.x and
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* bit[0] = 1 for 2.x driver code takes this as default case.
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*
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* But Bit value to identify ufs device is not consistent
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* across the targets it could be bit[0] = 0/1 for UFS2.x/3x
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* and vice versa. If the bit[0] value is not same as default
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* value used in driver and if its reverted then use flag
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* qcom,ufs-dev-revert to identify ufs device.
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*/
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ufs-dev-types = <2>;
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qcom,ufs-dev-revert;
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nvmem-cells = <&ufs_dev>, <&boot_config>;
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nvmem-cell-names = "ufs_dev", "boot_conf";
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status = "ok";
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};
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@@ -88,3 +88,58 @@
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pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
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};
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};
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&ufsphy_mem {
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/*
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* Here parrot phy is used for ravelin as it
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* do not have its own list for module load and
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* hence compatible is using parrot.
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* We have plan to improve this by making phy binary
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* target independent.
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*/
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compatible = "qcom,ufs-phy-qmp-v4-parrot";
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vdda-phy-supply = <&L5B>;
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vdda-pll-supply = <&L16B>;
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vdda-phy-max-microamp = <88530>;
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vdda-pll-max-microamp = <18310>;
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status = "ok";
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};
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&ufshc_mem {
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vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
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vcc-supply = <&L5E>;
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vcc-max-microamp = <1056000>;
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vccq-supply = <&L13B>;
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vccq-max-microamp = <750000>;
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vccq2-supply = <&L19B>;
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vccq2-max-microamp = <750000>;
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qcom,vddp-ref-clk-supply = <&L13B>;
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qcom,vddp-ref-clk-max-microamp = <100>;
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/*
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* ufs-dev-types and nvmem entries are for ufs device
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* identification using nvmem interface. Use number of
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* ufs devices supported for ufs-dev-types, and nvmem handle
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* added by pmic for sdam register.
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*
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* Default value taken by driver is bit[0] = 0 for 3.x and
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* bit[0] = 1 for 2.x driver code takes this as default case.
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*
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* But Bit value to identify ufs device is not consistent
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* across the targets it could be bit[0] = 0/1 for UFS2.x/3x
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* and vice versa. If the bit[0] value is not same as default
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* value used in driver and if its reverted then use flag
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* qcom,ufs-dev-revert to identify ufs device.
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*/
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ufs-dev-types = <2>;
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qcom,ufs-dev-revert;
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nvmem-cells = <&ufs_dev>, <&boot_config>;
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nvmem-cell-names = "ufs_dev", "boot_conf";
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status = "ok";
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};
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