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ARM: dts: msm: Add SLPI pinctrl for SM8150

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SLPI pinctrl driver is used to control pinmux
available on SLPI from APPS. This snapshot is
taken from msm-4.14 commit id "9ae5363d774".

Change-Id: Ide52c9d8a5228894f740ee09e3c2a75f3ad59866
This commit is contained in:
Vivek Kumar
2020-04-14 09:49:39 +05:30
parent 08e1de0844
commit 040ac67fde
3 changed files with 191 additions and 0 deletions
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4
qcom/sa8155.dtsi
View File

@@ -49,5 +49,9 @@
/delete-node/ rpmh-regulator-ldof6;
};
&slpi_tlmm {
status = "ok";
};
/* Add regulator nodes specific to SA8155 */
#include "sa8155-regulator.dtsi"

186
qcom/sm8150-slpi-pinctrl.dtsi Normal file
View File

@@ -0,0 +1,186 @@
&soc {
slpi_tlmm: slpi_pinctrl@02B40000 {
compatible = "qcom,slpi-pinctrl";
reg = <0x2B40000 0x20000>;
qcom,num-pins = <14>;
status = "disabled";
qupv3_se20_i2c_pins: qupv3_se20_i2c_pins {
qupv3_se20_i2c_active: qupv3_se20_i2c_active {
mux {
pins = "gpio0", "gpio1";
function = "func1";
};
config {
pins = "gpio0", "gpio1";
drive-strength = <2>;
bias-disable;
};
};
qupv3_se20_i2c_sleep: qupv3_se20_i2c_sleep {
mux {
pins = "gpio0", "gpio1";
function = "gpio";
};
config {
pins = "gpio0", "gpio1";
drive-strength = <2>;
bias-pull-down;
};
};
};
qupv3_se21_i2c_pins: qupv3_se21_i2c_pins {
qupv3_se21_i2c_active: qupv3_se21_i2c_active {
mux {
pins = "gpi2", "gpio3";
function = "func1";
};
config {
pins = "gpio2", "gpio3";
drive-strength = <2>;
bias-disable;
};
};
qupv3_se21_i2c_sleep: qupv3_se21_i2c_sleep {
mux {
pins = "gpio2", "gpio3";
function = "gpio";
};
config {
pins = "gpio2", "gpio3";
drive-strength = <2>;
bias-pull-down;
};
};
};
qupv3_se22_i2c_pins: qupv3_se22_i2c_pins {
qupv3_se22_i2c_active: qupv3_se22_i2c_active {
mux {
pins = "gpio6", "gpio7";
function = "func1";
};
config {
pins = "gpio6", "gpio7";
drive-strength = <2>;
bias-disable;
};
};
qupv3_se22_i2c_sleep: qupv3_se22_i2c_sleep {
mux {
pins = "gpio6", "gpio7";
function = "gpio";
};
config {
pins = "gpio6", "gpio7";
drive-strength = <2>;
bias-pull-down;
};
};
};
qupv3_se23_i2c_pins: qupv3_se23_i2c_pins {
qupv3_se23_i2c_active: qupv3_se23_i2c_active {
mux {
pins = "gpio8", "gpio9";
function = "func3";
};
config {
pins = "gpio8", "gpio9";
drive-strength = <2>;
bias-disable;
};
};
qupv3_se23_i2c_sleep: qupv3_se23_i2c_sleep {
mux {
pins = "gpio8", "gpio9";
function = "gpio";
};
config {
pins = "gpio8", "gpio9";
drive-strength = <2>;
bias-pull-down;
};
};
};
/* SE21 pin mappings */
qupv3_se21_spi_pins: qupv3_se21_spi_pins {
qupv3_se21_spi_active: qupv3_se21_spi_active {
mux {
pins = "gpio2", "gpio3", "gpio4",
"gpio5";
function = "func1";
};
config {
pins = "gpio2", "gpio3", "gpio4",
"gpio5";
drive-strength = <6>;
bias-disable;
};
};
qupv3_se21_spi_sleep: qupv3_se21_spi_sleep {
mux {
pins = "gpio2", "gpio3", "gpio4",
"gpio5";
function = "gpio";
};
config {
pins = "gpio2", "gpio3", "gpio4",
"gpio5";
drive-strength = <2>;
bias-pull-down;
};
};
};
/*SE22 pin mappings*/
qupv3_se22_spi_pins: qupv3_se22_spi_pins {
qupv3_se22_spi_active: qupv3_se22_spi_active {
mux {
pins = "gpio6", "gpio7", "gpio8",
"gpio9";
function = "func1";
};
config {
pins = "gpio6", "gpio7", "gpio8",
"gpio9";
drive-strength = <6>;
bias-disable;
};
};
qupv3_se22_spi_sleep: qupv3_se22_spi_sleep {
mux {
pins = "gpio6", "gpio7", "gpio8",
"gpio9";
function = "gpio";
};
config {
pins = "gpio6", "gpio7", "gpio8",
"gpio9";
drive-strength = <2>;
bias-pull-down;
};
};
};
};
};

1
qcom/sm8150.dtsi
View File

@@ -752,3 +752,4 @@
#include "sm8150-pinctrl.dtsi"
#include "sm8150-regulator.dtsi"
#include "sm8150-pm.dtsi"
#include "sm8150-slpi-pinctrl.dtsi"