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https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
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ARM: dts: msm: Update RC0 and RC1 PHY settings as per HSR v1.07 for neo
Update PCIe0 and PCIe1 PHY settings as per HSR v1.07 for the neo. Change-Id: I7033e263ac6bad1e609a8755b57caf7fbaca0214
This commit is contained in:
@@ -128,7 +128,7 @@
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qcom,config-recovery;
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qcom,target-link-speed = <0x2>;
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qcom,pcie-phy-ver = <104>;
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qcom,pcie-phy-ver = <107>;
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qcom,phy-status-offset = <0x214>;
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qcom,phy-status-bit = <6>;
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qcom,phy-power-down-offset = <0x240>;
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@@ -244,6 +244,7 @@
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0x0694 0x00 0x0
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0x03d0 0x8c 0x0
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0x0368 0x17 0x0
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0x0370 0x2e 0x0
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0x1424 0x01 0x0
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0x1428 0x01 0x0
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0x0200 0x00 0x0
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@@ -419,7 +420,7 @@
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qcom,num-parf-testbus-sel = <0xb9>;
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qcom,config-recovery;
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qcom,pcie-phy-ver = <104>;
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qcom,pcie-phy-ver = <107>;
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qcom,phy-status-offset = <0x214>;
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qcom,phy-status-bit = <6>;
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qcom,phy-power-down-offset = <0x240>;
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@@ -535,6 +536,7 @@
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0x0694 0x00 0x0
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0x03d0 0x8c 0x0
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0x0368 0x17 0x0
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0x0370 0x2e 0x0
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0x1424 0x01 0x0
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0x1428 0x01 0x0
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0x0200 0x00 0x0
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