ARM: dts: msm: Update RC0 and RC1 PHY settings as per HSR v1.07 for neo

Update PCIe0 and PCIe1 PHY settings as per HSR v1.07 for the neo.

Change-Id: I7033e263ac6bad1e609a8755b57caf7fbaca0214
This commit is contained in:
Vivek Pernamitta
2024-02-20 10:58:36 +05:30
parent e9f94f0a95
commit 095b6bc1d0

View File

@@ -128,7 +128,7 @@
qcom,config-recovery;
qcom,target-link-speed = <0x2>;
qcom,pcie-phy-ver = <104>;
qcom,pcie-phy-ver = <107>;
qcom,phy-status-offset = <0x214>;
qcom,phy-status-bit = <6>;
qcom,phy-power-down-offset = <0x240>;
@@ -244,6 +244,7 @@
0x0694 0x00 0x0
0x03d0 0x8c 0x0
0x0368 0x17 0x0
0x0370 0x2e 0x0
0x1424 0x01 0x0
0x1428 0x01 0x0
0x0200 0x00 0x0
@@ -419,7 +420,7 @@
qcom,num-parf-testbus-sel = <0xb9>;
qcom,config-recovery;
qcom,pcie-phy-ver = <104>;
qcom,pcie-phy-ver = <107>;
qcom,phy-status-offset = <0x214>;
qcom,phy-status-bit = <6>;
qcom,phy-power-down-offset = <0x240>;
@@ -535,6 +536,7 @@
0x0694 0x00 0x0
0x03d0 0x8c 0x0
0x0368 0x17 0x0
0x0370 0x2e 0x0
0x1424 0x01 0x0
0x1428 0x01 0x0
0x0200 0x00 0x0