Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
2
0
Fork 0
mirror of https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees synced 2026-01-30 00:08:32 +00:00
Code Issues Packages Projects Releases Wiki Activity

ARM: dts: msm: add bus scaling & gdsc info for diwali apps smmu

Browse Source 
Add bus scaling and GDSC for diwali apps smmu, allow access to
register spaces.

Change-Id: I68fb5751c38ee45097a7e4b466a69570309400ee
This commit is contained in:
Faiyaz Mohammed
2021-11-30 15:22:59 +05:30
parent 981adbee26
commit 0db5e7fcdb
1 changed files with 53 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

53
qcom/msm-arm-smmu-diwali.dtsi
View File

@@ -181,6 +181,11 @@
<GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>;
interconnects = <&gem_noc MASTER_APPSS_PROC
&config_noc SLAVE_TCU>;
qcom,active-only;
qcom,actlr =
/* For display, camera +0 deep PF */
<0x800 0x7ff 0x001>,
@@ -198,6 +203,9 @@
<0x151ce200 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x0 0x400>;
interconnects = <&gem_noc MASTER_APPSS_PROC
&config_noc SLAVE_IMEM_CFG>;
qcom,active-only;
qcom,micro-idle;
};
@@ -207,6 +215,9 @@
<0x151ce208 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x400 0x400>;
interconnects = <&gem_noc MASTER_APPSS_PROC
&config_noc SLAVE_IMEM_CFG>;
qcom,active-only;
qcom,micro-idle;
};
@@ -216,6 +227,11 @@
<0x151ce210 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x800 0x400>;
qcom,regulator-names = "vdd";
vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc>;
interconnects = <&mmss_noc MASTER_CAMNOC_HF
&mc_virt SLAVE_EBI1>;
qcom,active-only;
qcom,micro-idle;
};
@@ -225,6 +241,11 @@
<0x151ce218 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0xc00 0x400>;
qcom,regulator-names = "vdd";
vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc>;
interconnects = <&mmss_noc MASTER_CAMNOC_HF
&mc_virt SLAVE_EBI1>;
qcom,active-only;
qcom,micro-idle;
};
@@ -234,6 +255,9 @@
<0x151ce220 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x1000 0x400>;
interconnects = <&nsp_noc MASTER_CDSP_PROC
&mc_virt SLAVE_EBI1>;
qcom,active-only;
qcom,micro-idle;
};
@@ -243,6 +267,9 @@
<0x151ce228 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x1400 0x400>;
interconnects = <&nsp_noc MASTER_CDSP_PROC
&mc_virt SLAVE_EBI1>;
qcom,active-only;
qcom,micro-idle;
};
@@ -252,6 +279,9 @@
<0x151ce230 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x1800 0x400>;
interconnects = <&lpass_ag_noc MASTER_LPASS_PROC
&mc_virt SLAVE_EBI1>;
qcom,active-only;
qcom,micro-idle;
};
@@ -261,6 +291,9 @@
<0x151ce238 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x1c00 0x400>;
interconnects = <&pcie_noc MASTER_PCIE_0
&mc_virt SLAVE_EBI1>;
qcom,active-only;
qcom,micro-idle;
};
@@ -270,6 +303,11 @@
<0x151ce240 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x2000 0x400>;
qcom,regulator-names = "vdd";
vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc>;
interconnects = <&mmss_noc MASTER_CAMNOC_SF
&mc_virt SLAVE_EBI1>;
qcom,active-only;
qcom,micro-idle;
};
@@ -279,6 +317,11 @@
<0x151ce248 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x2400 0x400>;
qcom,regulator-names = "vdd";
vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc>;
interconnects = <&mmss_noc MASTER_CAMNOC_SF
&mc_virt SLAVE_EBI1>;
qcom,active-only;
qcom,micro-idle;
};
@@ -288,6 +331,11 @@
<0x151ce250 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x2800 0x400>;
qcom,regulator-names = "vdd";
vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc>;
interconnects = <&mmss_noc MASTER_CAMNOC_HF
&mc_virt SLAVE_EBI1>;
qcom,active-only;
qcom,micro-idle;
};
@@ -297,6 +345,11 @@
<0x151ce258 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x2c00 0x400>;
qcom,regulator-names = "vdd";
vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc>;
interconnects = <&mmss_noc MASTER_CAMNOC_HF
&mc_virt SLAVE_EBI1>;
qcom,active-only;
qcom,micro-idle;
};
};