Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
2
0
Fork 0
mirror of https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees synced 2026-01-27 20:28:49 +00:00
Code Issues Packages Projects Releases Wiki Activity

Merge "ARM: dts: msm: Update GPU frequency plan for Anorak"

Browse Source
This commit is contained in:
qctecmdr
2023-01-27 11:01:21 -08:00
committed by Gerrit - the friendly Code Review server
parent faa9e0f73a d048ac2218
commit 16a6511415
1 changed files with 12 additions and 48 deletions
Download Patch File Download Diff File Expand all files Collapse all files

60
qcom/anorak-gpu.dtsi
View File

@@ -34,7 +34,7 @@
qcom,chipid = <0x43050b00>;
qcom,initial-pwrlevel = <8>;
qcom,initial-pwrlevel = <5>;
qcom,no-nap;
@@ -79,54 +79,18 @@
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <788000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
qcom,gpu-freq = <681000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
qcom,bus-freq = <9>;
qcom,bus-min = <9>;
qcom,bus-max = <9>;
qcom,acd-level = <0x882c5ffd>;
qcom,acd-level = <0xa82c5ffd>;
};
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <750000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO>;
qcom,bus-freq = <9>;
qcom,bus-min = <9>;
qcom,bus-max = <9>;
qcom,acd-level = <0xa82c5ffd>;
};
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <730000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
qcom,bus-freq = <9>;
qcom,bus-min = <8>;
qcom,bus-max = <9>;
qcom,acd-level = <0xa82c5ffd>;
};
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <690000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
qcom,bus-freq = <9>;
qcom,bus-min = <7>;
qcom,bus-max = <9>;
qcom,acd-level = <0xa82c5ffd>;
};
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <640000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
@@ -137,8 +101,8 @@
qcom,acd-level = <0x882e5ffd>;
};
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <599000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
@@ -149,8 +113,8 @@
qcom,acd-level = <0x882e5ffd>;
};
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <492000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
@@ -161,8 +125,8 @@
qcom,acd-level = <0x882e5ffd>;
};
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <350000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
@@ -173,8 +137,8 @@
qcom,acd-level = <0xc0295ffd>;
};
qcom,gpu-pwrlevel@8 {
reg = <8>;
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-freq = <285000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;