mirror of
https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
synced 2026-02-01 08:51:30 +00:00
display: Add support for Xiaomi 12S Ultra (thor|L1)
Change-Id: Ie41a2298098c85049e591ccb2bace498429cf2da
This commit is contained in:
Arian
@@ -40,7 +40,8 @@ dtbo-$(CONFIG_ARCH_CAPE) += display/cape-sde.dtbo \
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display/cape-sde-display-mtp-overlay.dtbo \
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display/cape-sde-display-mtp-120fps-overlay.dtbo \
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display/cape-sde-display-mtp-nodisplay-overlay.dtbo \
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display/cape-sde-display-qrd-overlay.dtbo
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display/cape-sde-display-qrd-overlay.dtbo \
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display/thor-sde-display-cape-mtp-overlay.dtbo
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else
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dtbo-$(CONFIG_ARCH_CAPE) += display/trustedvm-cape-sde-display-qrd-overlay.dtbo \
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display/trustedvm-cape-sde-display-cdp-overlay.dtbo \
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280
qcom/display/display/dsi-panel-l1-38-0c-0a-dsc-cmd-common.dtsi
Normal file
280
qcom/display/display/dsi-panel-l1-38-0c-0a-dsc-cmd-common.dtsi
Normal file
@@ -0,0 +1,280 @@
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qcom,mdss-dsi-off-command = [
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05 00 00 00 14 00 02 28 00
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05 00 00 00 64 00 02 10 00
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];
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qcom,mdss-dsi-off-command-state = "dsi_lp_mode";
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mi,mdss-dsi-dimmingon-command = [15 00 00 00 00 00 02 53 28];
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mi,mdss-dsi-dimmingon-command-state = "dsi_hs_mode";
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mi,mdss-dsi-dimmingoff-command = [15 00 00 00 00 00 02 53 20];
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mi,mdss-dsi-dimmingoff-command-state = "dsi_hs_mode";
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mi,mdss-dsi-local-hbm-normal-white-1000nit-command = [
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/* Local HBM setting */
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39 00 00 40 00 00 03 F0 5A 5A
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39 00 00 40 00 00 04 B0 01 DC 1F
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39 00 00 40 00 00 10 1F
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||||
02 00 00 00 00 24 09 1F 35 FA 3F 2D 09 AF 86
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39 00 00 40 00 00 04 B0 02 AC 66
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39 00 00 40 00 00 03 66 0F FF
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39 00 00 40 00 00 04 B0 01 6D 66
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39 00 00 40 00 00 13 66
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00 40 14 02 90 52 0A 41 48 1C 27 FF FF FF FF FF
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FF FF
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39 00 00 40 00 00 04 B0 01 59 66
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39 00 00 40 00 00 0B 66
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08 7A 9F F5 AF 08 7A 9F F5 AF /* 1100nit */
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39 00 00 40 00 00 04 B0 01 B5 66
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39 00 00 40 00 00 37 66
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14 01 DE 2A 43 A2 4F 66 CC 80 08 00 80 08 00 80
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08 00 14 01 DE 2A 43 A2 4F 66 CC 80 08 00 80 08
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00 80 08 00 14 01 DE 2A 43 A2 4F 66 CC 80 08 00
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80 08 00 80 08 00
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39 00 00 40 00 00 04 B0 01 EB 66
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39 00 00 40 00 00 37 66
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14 61 EE 2A 43 A2 4F 66 CC 80 08 00 80 08 00 80
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08 00 14 61 EE 2A 43 A2 4F 66 CC 80 08 00 80 08
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00 80 08 00 14 61 EE 2A 43 A2 4F 66 CC 80 08 00
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80 08 00 80 08 00
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39 00 00 40 00 00 02 53 30 /* 0x30 Local HBM transition */
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39 00 00 40 00 00 03 51 00 00
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39 00 00 00 00 00 03 F0 A5 A5
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];
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/* <mipi_address update_index update_length> */
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mi,mdss-dsi-local-hbm-normal-white-1000nit-command-update = <0x51 14 2>;
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mi,mdss-dsi-local-hbm-normal-white-1000nit-command-state = "dsi_hs_mode";
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mi,mdss-dsi-local-hbm-normal-white-750nit-command = [
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/* Local HBM setting */
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39 00 00 40 00 00 03 F0 5A 5A
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39 00 00 40 00 00 04 B0 01 DC 1F
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39 00 00 40 00 00 10 1F
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02 00 00 00 00 24 09 1F 35 FA 3F 2D 09 AF 86
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39 00 00 40 00 00 04 B0 02 AC 66
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39 00 00 40 00 00 03 66 0F FF
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39 00 00 40 00 00 04 B0 01 6D 66
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39 00 00 40 00 00 13 66
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00 40 14 02 90 52 0A 41 48 1C 27 FF FF FF FF FF
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FF FF
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39 00 00 40 00 00 04 B0 01 59 66
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39 00 00 40 00 00 0B 66
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08 79 23 8B E8 08 79 23 8B E8 /* 825nit */
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39 00 00 40 00 00 04 B0 01 B5 66
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39 00 00 40 00 00 37 66
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14 01 DE 2A 43 A2 4F 66 CC 80 08 00 80 08 00 80
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08 00 14 01 DE 2A 43 A2 4F 66 CC 80 08 00 80 08
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00 80 08 00 14 01 DE 2A 43 A2 4F 66 CC 80 08 00
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80 08 00 80 08 00
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39 00 00 40 00 00 04 B0 01 EB 66
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39 00 00 40 00 00 37 66
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14 61 EE 2A 43 A2 4F 66 CC 80 08 00 80 08 00 80
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08 00 14 61 EE 2A 43 A2 4F 66 CC 80 08 00 80 08
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00 80 08 00 14 61 EE 2A 43 A2 4F 66 CC 80 08 00
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80 08 00 80 08 00
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39 00 00 40 00 00 02 53 30 /* 0x30 Local HBM transition */
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39 00 00 00 00 00 03 F0 A5 A5
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];
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mi,mdss-dsi-local-hbm-normal-white-750nit-command-state = "dsi_hs_mode";
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mi,mdss-dsi-local-hbm-normal-white-500nit-command = [
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/* Local HBM setting */
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39 00 00 40 00 00 03 F0 5A 5A
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39 00 00 40 00 00 04 B0 01 DC 1F
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39 00 00 40 00 00 10 1F
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02 00 00 00 00 24 09 1F 35 FA 3F 2D 09 AF 86
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39 00 00 40 00 00 04 B0 02 AC 66
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39 00 00 40 00 00 03 66 0F FF
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39 00 00 40 00 00 04 B0 01 6D 66
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39 00 00 40 00 00 13 66
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00 40 14 02 90 52 0A 41 48 1C 27 FF FF FF FF FF
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FF FF
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39 00 00 40 00 00 04 B0 01 59 66
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39 00 00 40 00 00 0B 66
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07 79 93 0A 18 07 79 93 0A 18 /* 550nit */
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39 00 00 40 00 00 04 B0 01 B5 66
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39 00 00 40 00 00 37 66
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14 01 DE 2A 43 A2 4F 66 CC 80 08 00 80 08 00 80
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08 00 14 01 DE 2A 43 A2 4F 66 CC 80 08 00 80 08
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00 80 08 00 14 01 DE 2A 43 A2 4F 66 CC 80 08 00
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80 08 00 80 08 00
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39 00 00 40 00 00 04 B0 01 EB 66
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39 00 00 40 00 00 37 66
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14 61 EE 2A 43 A2 4F 66 CC 80 08 00 80 08 00 80
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08 00 14 61 EE 2A 43 A2 4F 66 CC 80 08 00 80 08
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00 80 08 00 14 61 EE 2A 43 A2 4F 66 CC 80 08 00
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80 08 00 80 08 00
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39 00 00 40 00 00 02 53 30 /* 0x30 Local HBM transition */
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39 00 00 00 00 00 03 F0 A5 A5
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];
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mi,mdss-dsi-local-hbm-normal-white-500nit-command-state = "dsi_hs_mode";
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mi,mdss-dsi-local-hbm-normal-white-110nit-command = [
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/* Local HBM setting */
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39 00 00 40 00 00 03 F0 5A 5A
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39 00 00 40 00 00 04 B0 01 DC 1F
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39 00 00 40 00 00 10 1F
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02 00 00 00 00 24 09 1F 35 FA 3F 2D 09 AF 86
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39 00 00 40 00 00 04 B0 02 AC 66
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39 00 00 40 00 00 03 66 0F FF
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39 00 00 40 00 00 04 B0 01 6D 66
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39 00 00 40 00 00 13 66
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00 40 14 02 90 52 0A 41 48 1C 27 FF FF FF FF FF
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FF FF
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39 00 00 40 00 00 04 B0 01 59 66
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39 00 00 40 00 00 0B 66
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05 56 E0 83 E8 05 56 E0 83 E8 /* 110nit */
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39 00 00 40 00 00 04 B0 01 B5 66
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39 00 00 40 00 00 37 66
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14 01 DE 2A 43 A2 4F 66 CC 80 08 00 80 08 00 80
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08 00 14 01 DE 2A 43 A2 4F 66 CC 80 08 00 80 08
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00 80 08 00 14 01 DE 2A 43 A2 4F 66 CC 80 08 00
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80 08 00 80 08 00
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39 00 00 40 00 00 04 B0 01 EB 66
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39 00 00 40 00 00 37 66
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14 61 EE 2A 43 A2 4F 66 CC 80 08 00 80 08 00 80
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08 00 14 61 EE 2A 43 A2 4F 66 CC 80 08 00 80 08
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00 80 08 00 14 61 EE 2A 43 A2 4F 66 CC 80 08 00
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80 08 00 80 08 00
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39 00 00 40 00 00 02 53 30 /* 0x30 Local HBM transition */
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39 00 00 00 00 00 03 F0 A5 A5
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];
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mi,mdss-dsi-local-hbm-normal-white-110nit-command-state = "dsi_hs_mode";
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mi,mdss-dsi-local-hbm-normal-green-500nit-command = [
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/* Local HBM setting*/
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39 00 00 40 00 00 03 F0 5A 5A
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39 00 00 40 00 00 04 B0 01 DC 1F
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||||
39 00 00 40 00 00 10 1F
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02 00 00 00 00 24 09 1F 35 FA 3F 2D 09 AF 86
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||||
39 00 00 40 00 00 04 B0 02 AC 66
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||||
39 00 00 40 00 00 03 66 0F FF
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||||
39 00 00 40 00 00 04 B0 01 6D 66
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||||
39 00 00 40 00 00 13 66
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||||
00 40 14 02 90 52 0A 41 48 1C 27 FF FF FF FF FF
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FF FF
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39 00 00 40 00 00 04 B0 01 59 66
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39 00 00 40 00 00 0B 66
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00 70 00 5C 00 00 70 00 5C 00 /* Green 500nit */
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39 00 00 40 00 00 04 B0 01 B5 66
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39 00 00 40 00 00 37 66
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14 01 DE 2A 43 A2 4F 66 CC 80 08 00 80 08 00 80
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08 00 14 01 DE 2A 43 A2 4F 66 CC 80 08 00 80 08
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||||
00 80 08 00 14 01 DE 2A 43 A2 4F 66 CC 80 08 00
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||||
80 08 00 80 08 00
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||||
39 00 00 40 00 00 04 B0 01 EB 66
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||||
39 00 00 40 00 00 37 66
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||||
14 61 EE 2A 43 A2 4F 66 CC 80 08 00 80 08 00 80
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08 00 14 61 EE 2A 43 A2 4F 66 CC 80 08 00 80 08
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||||
00 80 08 00 14 61 EE 2A 43 A2 4F 66 CC 80 08 00
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||||
80 08 00 80 08 00
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39 00 00 40 00 00 02 53 30 /* 0x30 Local HBM transition */
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39 00 00 00 00 00 03 F0 A5 A5
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];
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mi,mdss-dsi-local-hbm-normal-green-500nit-command-state = "dsi_hs_mode";
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mi,mdss-dsi-local-hbm-off-to-normal-command = [
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/* Local HBM Off -> normal */
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39 00 00 40 00 00 03 F0 5A 5A
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15 00 00 40 00 00 02 53 20
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39 00 00 00 00 00 03 F0 A5 A5
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];
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mi,mdss-dsi-local-hbm-off-to-normal-command-state = "dsi_lp_mode";
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mi,mdss-dsi-local-hbm-off-to-hbm-command = [
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/* Local HBM Off -> HBM */
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39 00 00 40 00 00 03 F0 5A 5A
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15 00 00 40 00 00 02 53 E8
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39 00 00 40 00 00 03 51 00 00
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39 00 00 00 00 00 03 F0 A5 A5
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];
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/* <mipi_address update_index update_length> */
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mi,mdss-dsi-local-hbm-off-to-hbm-command-update = <0x51 2 2>;
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mi,mdss-dsi-local-hbm-off-to-hbm-command-state = "dsi_lp_mode";
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mi,mdss-dsi-local-hbm-off-to-hlpm-command = [
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/* Local HBM Off -> AOD 60nit */
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39 00 00 40 00 00 03 F0 5A 5A
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39 00 00 40 00 00 02 BB 31
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15 00 00 40 00 00 02 F7 0F
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39 00 00 40 00 00 03 F0 A5 A5
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||||
39 00 00 40 00 00 03 F0 5A 5A
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15 00 00 40 00 00 02 53 24
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39 00 00 40 00 00 03 51 07 FF
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15 00 00 40 00 00 02 F7 0F
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39 00 00 00 00 00 03 F0 A5 A5
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];
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mi,mdss-dsi-local-hbm-off-to-hlpm-command-state = "dsi_lp_mode";
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mi,mdss-dsi-local-hbm-off-to-llpm-command = [
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/* Local HBM Off -> AOD 5nit */
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39 00 00 40 00 00 03 F0 5A 5A
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39 00 00 40 00 00 02 BB 31
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15 00 00 40 00 00 02 F7 0F
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||||
39 00 00 40 00 00 03 F0 A5 A5
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||||
39 00 00 40 00 00 03 F0 5A 5A
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||||
15 00 00 40 00 00 02 53 24
|
||||
39 00 00 40 00 00 03 51 00 F6
|
||||
15 00 00 40 00 00 02 F7 0F
|
||||
39 00 00 00 00 00 03 F0 A5 A5
|
||||
];
|
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mi,mdss-dsi-local-hbm-off-to-llpm-command-state = "dsi_lp_mode";
|
||||
|
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mi,mdss-dsi-hbm-on-command = [
|
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/* HBM Mode ON */
|
||||
15 00 00 40 00 00 02 53 E8
|
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39 00 00 00 00 00 03 51 00 00
|
||||
];
|
||||
/* <mipi_address update_index update_length> */
|
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mi,mdss-dsi-hbm-on-command-update = <0x51 1 2>;
|
||||
mi,mdss-dsi-hbm-on-command-state = "dsi_lp_mode";
|
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mi,mdss-dsi-hbm-off-command = [
|
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/* HBM Mode OFF */
|
||||
15 00 00 40 00 00 02 53 28
|
||||
39 00 00 00 00 00 03 51 07 FF
|
||||
];
|
||||
/* <mipi_address update_index update_length> */
|
||||
mi,mdss-dsi-hbm-off-command-update = <0x51 1 2>;
|
||||
mi,mdss-dsi-hbm-off-command-state = "dsi_lp_mode";
|
||||
|
||||
mi,mdss-dsi-hbm-fod-on-command = [
|
||||
/* HBM On */
|
||||
15 00 00 40 00 00 02 53 E0
|
||||
39 00 00 00 00 00 03 51 07 FF
|
||||
];
|
||||
mi,mdss-dsi-hbm-fod-on-command-state = "dsi_lp_mode";
|
||||
mi,mdss-dsi-hbm-fod-off-command = [
|
||||
/* HBM off*/
|
||||
15 00 00 40 00 00 02 53 20
|
||||
39 00 00 00 00 00 03 51 07 FF
|
||||
];
|
||||
/* <mipi_address update_index update_length> */
|
||||
mi,mdss-dsi-hbm-fod-off-command-update = <0x51 1 2>;
|
||||
mi,mdss-dsi-hbm-fod-off-command-state = "dsi_lp_mode";
|
||||
|
||||
mi,mdss-dsi-flat-mode-on-command = [
|
||||
39 00 00 40 00 00 03 F0 5A 5A
|
||||
39 00 00 40 00 00 04 B0 02 BB 1D
|
||||
39 00 00 40 00 00 02 1D 0F
|
||||
39 00 00 40 00 00 04 B0 02 B5 1D
|
||||
/* FLAT Mode ON */
|
||||
39 00 00 40 00 00 29 1D
|
||||
27 23 6C 03 4E 86 0F FF 10 73 FF 10 FF 6B 8C 2D 06 07
|
||||
06 1B 1F 18 24 29 20 2B 31 26 2E 34 28 A4 E4 A4 08 74
|
||||
80 00 00 22
|
||||
39 00 00 00 00 00 03 F0 A5 A5
|
||||
];
|
||||
mi,mdss-dsi-flat-mode-on-command-state = "dsi_lp_mode";
|
||||
mi,mdss-dsi-flat-mode-off-command = [
|
||||
39 00 00 40 00 00 03 F0 5A 5A
|
||||
39 00 00 40 00 00 04 B0 02 BB 1D
|
||||
39 00 00 40 00 00 02 1D 0F
|
||||
39 00 00 40 00 00 04 B0 02 B5 1D
|
||||
/* LRU Mode ON */
|
||||
39 00 00 40 00 00 29 1D
|
||||
27 03 A4 03 5A 80 0F FF 10 73 FF 10 FF 6B 8C 2D 07 07
|
||||
07 1E 1E 1E 28 28 28 2F 2F 2F 32 32 32 A4 E4 A4 08 74
|
||||
80 00 00 22
|
||||
39 00 00 00 00 00 03 F0 A5 A5
|
||||
];
|
||||
mi,mdss-dsi-flat-mode-off-command-state = "dsi_lp_mode";
|
||||
1274
qcom/display/display/dsi-panel-l1-38-0c-0a-dsc-cmd-res-fhd.dtsi
Normal file
1274
qcom/display/display/dsi-panel-l1-38-0c-0a-dsc-cmd-res-fhd.dtsi
Normal file
File diff suppressed because it is too large
Load Diff
3595
qcom/display/display/dsi-panel-l1-38-0c-0a-dsc-cmd.dtsi
Executable file
3595
qcom/display/display/dsi-panel-l1-38-0c-0a-dsc-cmd.dtsi
Executable file
File diff suppressed because it is too large
Load Diff
12
qcom/display/display/thor-sde-display-cape-mtp-overlay.dts
Normal file
12
qcom/display/display/thor-sde-display-cape-mtp-overlay.dts
Normal file
@@ -0,0 +1,12 @@
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "thor-sde-display-cape-mtp.dtsi"
|
||||
|
||||
/ {
|
||||
model = "thor based on Qualcomm Technologies, Inc SM8475";
|
||||
compatible = "qcom,cape-mtp", "qcom,cape", "qcom,mtp";
|
||||
qcom,msm-id = <530 0x10000>, <531 0x10000>, <540 0x10000>;
|
||||
qcom,board-id = <0x10008 0>;
|
||||
xiaomi,miboard-id = <0x6 0>;
|
||||
};
|
||||
237
qcom/display/display/thor-sde-display-cape-mtp.dtsi
Normal file
237
qcom/display/display/thor-sde-display-cape-mtp.dtsi
Normal file
@@ -0,0 +1,237 @@
|
||||
#include "cape-sde-display.dtsi"
|
||||
#include "dsi-panel-l1-38-0c-0a-dsc-cmd.dtsi"
|
||||
|
||||
&soc {
|
||||
dsi_panel_pwr_supply_L1: dsi_panel_pwr_supply_L1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
qcom,panel-supply-entry@0 {
|
||||
reg = <0>;
|
||||
qcom,supply-name = "vci";
|
||||
qcom,supply-min-voltage = <3000000>;
|
||||
qcom,supply-max-voltage = <3000000>;
|
||||
qcom,supply-enable-load = <300000>;
|
||||
qcom,supply-disable-load = <0>;
|
||||
qcom,supply-post-on-sleep = <1>;
|
||||
qcom,supply-post-off-sleep = <1>;
|
||||
};
|
||||
qcom,panel-supply-entry@1 {
|
||||
reg = <1>;
|
||||
qcom,supply-name = "vddio";
|
||||
qcom,supply-min-voltage = <1800000>;
|
||||
qcom,supply-max-voltage = <1800000>;
|
||||
qcom,supply-enable-load = <300000>;
|
||||
qcom,supply-disable-load = <80>;
|
||||
qcom,supply-post-on-sleep = <1>;
|
||||
qcom,supply-post-off-sleep = <1>;
|
||||
};
|
||||
qcom,panel-supply-entry@2 {
|
||||
reg = <2>;
|
||||
qcom,supply-name = "vddd";
|
||||
qcom,supply-min-voltage = <1500000>;
|
||||
qcom,supply-max-voltage = <1500000>;
|
||||
qcom,supply-enable-load = <300000>;
|
||||
qcom,supply-disable-load = <0>;
|
||||
qcom,supply-post-on-sleep = <1>;
|
||||
qcom,supply-post-off-sleep = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&dsi_l1_38_0c_0a_dsc_cmd {
|
||||
qcom,mdss-dsi-panel-vsync-delay;
|
||||
qcom,ulps-enabled;
|
||||
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
|
||||
qcom,mdss-dsi-clk-strength = <0xFF>;
|
||||
qcom,mdss-dsi-display-timings {
|
||||
/* WQHD 60Hz */
|
||||
timing@wqhd_60hz_index_00{
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 2B 0C 0C 1C 26 0C
|
||||
0C 0B 02 04 00 24 11];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
/* WQHD 120hz */
|
||||
timing@wqhd_120hz_index_01{
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 2B 0C 0C 1C 26 0C
|
||||
0C 0B 02 04 00 24 11];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
/* WQHD 90hz */
|
||||
timing@wqhd_90hz_index_02{
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 2B 0C 0C 1C 26 0C
|
||||
0C 0B 02 04 00 24 11];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
/* WQHD 40hz */
|
||||
timing@wqhd_40hz_index_03{
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 2B 0C 0C 1C 26 0C
|
||||
0C 0B 02 04 00 24 11];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
/* WQHD 30hz */
|
||||
timing@wqhd_30hz_index_04{
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 2B 0C 0C 1C 26 0C
|
||||
0C 0B 02 04 00 24 11];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
/* WQHD 24hz */
|
||||
timing@wqhd_24hz_index_05{
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 2B 0C 0C 1C 26 0C
|
||||
0C 0B 02 04 00 24 11];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
/* WQHD 10hz */
|
||||
timing@wqhd_10hz_index_06{
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 2B 0C 0C 1C 26 0C
|
||||
0C 0B 02 04 00 24 11];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
/* WQHD 1hz */
|
||||
timing@wqhd_1hz_index_07{
|
||||
qcom,mdss-dsi-panel-phy-timings = [00 2B 0C 0C 1C 26 0C
|
||||
0C 0B 02 04 00 24 11];
|
||||
qcom,display-topology = <2 2 1>;
|
||||
qcom,default-topology-index = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi_l1_38_0c_0a_dsc_cmd {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_L1>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <4>;
|
||||
qcom,mdss-dsi-bl-max-level = <2047>;
|
||||
qcom,mdss-brightness-max-level = <2047>;
|
||||
qcom,mdss-brightness-init-level = <307>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 106 0>;
|
||||
};
|
||||
|
||||
&dsi_r66451_amoled_video {
|
||||
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_L1>;
|
||||
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
|
||||
qcom,mdss-dsi-bl-min-level = <1>;
|
||||
qcom,mdss-dsi-bl-max-level = <4095>;
|
||||
qcom,mdss-brightness-max-level = <255>;
|
||||
qcom,mdss-dsi-bl-inverted-dbv;
|
||||
qcom,platform-reset-gpio = <&tlmm 106 0>;
|
||||
};
|
||||
|
||||
&sde_dsi_active {
|
||||
mux {
|
||||
pins = "gpio106";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio106";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable = <0>; /* no pull */
|
||||
};
|
||||
};
|
||||
|
||||
&sde_dsi_suspend {
|
||||
mux {
|
||||
pins = "gpio106";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio106";
|
||||
drive-strength = <2>; /* 2 mA */
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
};
|
||||
};
|
||||
&soc {
|
||||
display_panel_vddio: display_panel_vddio {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "display_panel_vddio";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
gpio = <&tlmm 74 0>;
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
display_panel_vddd: display_panel_vddd {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "display_panel_vddd";
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
gpio = <&tlmm 64 0>;
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
display_panel_vci: display_panel_vci {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "display_panel_vci";
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
gpio = <&tlmm 75 0>;
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
|
||||
&sde_dsi {
|
||||
qcom,dsi-default-panel = <&dsi_r66451_amoled_video>;
|
||||
vddd-supply = <&display_panel_vddd>;
|
||||
vci-supply = <&display_panel_vci>;
|
||||
vddio-supply = <&display_panel_vddio>;
|
||||
};
|
||||
|
||||
|
||||
&sde_dsi1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&sde_dp {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pm8350c_rgb {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mdss_mdp {
|
||||
connectors = <&sde_dsi &smmu_sde_unsec &smmu_sde_sec &sde_wb &sde_rscc>;
|
||||
};
|
||||
|
||||
&qupv3_se4_spi {
|
||||
fts@0 {
|
||||
panel = <&dsi_l1_38_0c_0a_dsc_cmd
|
||||
&dsi_r66451_amoled_video>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
thermal-message {
|
||||
board-sensor = "VIRTUAL-SENSOR0";
|
||||
};
|
||||
thermal_screen: thermal-screen {
|
||||
panel = <&dsi_l1_38_0c_0a_dsc_cmd
|
||||
&dsi_r66451_amoled_video>;
|
||||
};
|
||||
charge_screen: charge-screen {
|
||||
panel = <&dsi_l1_38_0c_0a_dsc_cmd
|
||||
&dsi_r66451_amoled_video>;
|
||||
};
|
||||
};
|
||||
|
||||
&spmi_bus {
|
||||
qcom,pm8350b@3 {
|
||||
qcom,amoled-ecm@f900 {
|
||||
display-panels = <&dsi_l1_38_0c_0a_dsc_cmd
|
||||
&dsi_r66451_amoled_video>;
|
||||
};
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user