mirror of
https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
synced 2026-01-27 14:44:08 +00:00
ARM: dts: msm: Move cnss nodes to diwali-idp-hsp.dtsi
It is recommended to have cnss nodes in diwali-idp-hsp.dtsi, so add code to move the cnss nodes from diwali-hsp.dtsi to diwali-idp-hsp.dtsi. Change-Id: I66d13fea7a52fe0a5a8ac157be1ae9fe4fb1936e
This commit is contained in:
Mohammed Siddiq
@@ -3,138 +3,6 @@
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/ {
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};
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&wpss_pas {
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status = "disabled";
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};
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&icnss2 {
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status = "disabled";
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};
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&reserved_memory {
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cnss_wlan_mem: cnss_wlan_region {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
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reusable;
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alignment = <0x0 0x400000>;
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size = <0x0 0x2000000>;
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};
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};
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&pcie0 {
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status = "ok";
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};
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&soc {
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bluetooth: bt_wcn6x5x {
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compatible = "qcom,qca6490";
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};
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wlan: qcom,cnss-qca6490@b0000000 {
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compatible = "qcom,cnss-qca6490";
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reg = <0xb0000000 0x10000>;
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reg-names = "smmu_iova_ipa";
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wlan-en-gpio = <&tlmm 49 0>;
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qcom,bt-en-gpio = <&tlmm 114 0>;
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pinctrl-names = "wlan_en_active", "wlan_en_sleep";
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pinctrl-0 = <&cnss_wlan_en_active>;
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pinctrl-1 = <&cnss_wlan_en_sleep>;
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qcom,wlan;
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qcom,wlan-rc-num = <0>;
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qcom,wlan-ramdump-dynamic = <0x420000>;
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qcom,wlan-cbc-enabled;
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use-pm-domain;
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cnss-enable-self-recovery;
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qcom,same-dt-multi-dev;
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mboxes = <&qmp_aop 0>;
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qcom,vreg_ipa="s1c";
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vdd-wlan-aon-supply = <&S7B>;
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qcom,vdd-wlan-aon-config = <950000 952000 0 0 1>;
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vdd-wlan-dig-supply = <&S7B>;
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qcom,vdd-wlan-dig-config = <950000 952000 0 0 1>;
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vdd-wlan-io-supply = <&L18B>;
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qcom,vdd-wlan-io-config = <1800000 1800000 0 0 1>;
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vdd-wlan-rfa1-supply = <&S1B>;
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qcom,vdd-wlan-rfa1-config = <1880000 2040000 0 0 1>;
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vdd-wlan-rfa2-supply = <&S8B>;
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qcom,vdd-wlan-rfa2-config = <1350000 1350000 0 0 1>;
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wlan-ant-switch-supply = <&L11C>;
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qcom,wlan-ant-switch-config = <2800000 2800000 0 0 0>;
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interconnects =
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<&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>,
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<&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>;
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interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr";
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qcom,icc-path-count = <2>;
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qcom,bus-bw-cfg-count = <9>;
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qcom,bus-bw-cfg =
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/** ICC Path 1 **/
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<0 0>, /* no vote */
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/* idle: 0-18 Mbps snoc/anoc: 100 Mhz ddr: 451.2 MHz */
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<2250 700000>,
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/* low: 18-60 Mbps snoc/anoc: 100 Mhz ddr: 451.2 MHz */
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<7500 700000>,
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/* medium: 60-240 Mbps snoc/anoc: 100 Mhz ddr: 451.2 MHz */
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<30000 700000>,
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/* high: 240-1200 Mbps snoc/anoc: 100 Mhz ddr: 451.2 MHz */
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<100000 700000>,
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/* very high: > 1200 Mbps snoc/anoc: 403 Mhz ddr: 1555 MHz */
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<175000 3000000>,
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/* ultra high: DBS mode snoc/anoc: 403 Mhz ddr: 2092 MHz */
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<175000 3000000>,
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/* super high: DBS mode snoc/anoc: 533 Mhz ddr: 3.2GHz */
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<175000 4000000>,
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/* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz
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* ddr: 547.2 MHz
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*/
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<7500 1500000>,
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/** ICC Path 2 **/
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<0 0>,
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/* ddr: 451.2 MHz */
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<2250 2400000>,
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/* ddr: 451.2 MHz */
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<7500 2400000>,
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/* ddr: 451.2 MHz */
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<30000 2400000>,
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/* ddr: 451.2 MHz */
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<100000 2400000>,
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/* ddr: 1555 MHz */
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<175000 8000000>,
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/* ddr: 2092 MHz */
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<175000 9600000>,
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/* ddr: 3.2 GHz */
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<175000 10000000>,
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/* ddr: 547.2 MHz */
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<7500 2400000>;
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};
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};
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&pcie0_rp {
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#address-cells = <5>;
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#size-cells = <0>;
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cnss_pci: cnss_pci {
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reg = <0 0 0 0 0>;
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qcom,iommu-group = <&cnss_pci_iommu_group>;
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memory-region = <&cnss_wlan_mem>;
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#address-cells = <1>;
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#size-cells = <1>;
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cnss_pci_iommu_group: cnss_pci_iommu_group {
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qcom,iommu-msi-size = <0x1000>;
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qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
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qcom,iommu-dma = "fastmap";
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qcom,iommu-pagetable = "coherent";
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qcom,iommu-faults = "stall-disable", "HUPCF", "no-CFRE",
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"non-fatal";
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};
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};
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};
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&gcc {
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clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>,
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<&pcie_0_pipe_clk>, <&ufs_phy_rx_symbol_0_clk>,
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@@ -1,6 +1,7 @@
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/interconnect/qcom,diwali.h>
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#include "diwali-idp-hsp.dtsi"
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/ {
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@@ -1,5 +1,134 @@
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#include "diwali-idp.dtsi"
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#include "diwali-idp-pm7250b.dtsi"
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&soc {
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&wpss_pas {
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status = "disabled";
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};
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&icnss2 {
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status = "disabled";
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};
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&reserved_memory {
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cnss_wlan_mem: cnss_wlan_region {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
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reusable;
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alignment = <0x0 0x400000>;
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size = <0x0 0x2000000>;
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};
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};
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&pcie0 {
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status = "ok";
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};
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&soc {
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bluetooth: bt_wcn6x5x {
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compatible = "qcom,qca6490";
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};
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wlan: qcom,cnss-qca6490@b0000000 {
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compatible = "qcom,cnss-qca6490";
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reg = <0xb0000000 0x10000>;
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reg-names = "smmu_iova_ipa";
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wlan-en-gpio = <&tlmm 49 0>;
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qcom,bt-en-gpio = <&tlmm 114 0>;
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pinctrl-names = "wlan_en_active", "wlan_en_sleep";
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pinctrl-0 = <&cnss_wlan_en_active>;
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pinctrl-1 = <&cnss_wlan_en_sleep>;
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qcom,wlan;
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qcom,wlan-rc-num = <0>;
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qcom,wlan-ramdump-dynamic = <0x420000>;
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qcom,wlan-cbc-enabled;
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use-pm-domain;
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cnss-enable-self-recovery;
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qcom,same-dt-multi-dev;
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mboxes = <&qmp_aop 0>;
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qcom,vreg_ipa="s1c";
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vdd-wlan-aon-supply = <&S7B>;
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qcom,vdd-wlan-aon-config = <950000 952000 0 0 1>;
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vdd-wlan-dig-supply = <&S7B>;
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qcom,vdd-wlan-dig-config = <950000 952000 0 0 1>;
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vdd-wlan-io-supply = <&L18B>;
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qcom,vdd-wlan-io-config = <1800000 1800000 0 0 1>;
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vdd-wlan-rfa1-supply = <&S1B>;
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qcom,vdd-wlan-rfa1-config = <1880000 2040000 0 0 1>;
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vdd-wlan-rfa2-supply = <&S8B>;
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qcom,vdd-wlan-rfa2-config = <1350000 1350000 0 0 1>;
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wlan-ant-switch-supply = <&L11C>;
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qcom,wlan-ant-switch-config = <2800000 2800000 0 0 0>;
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interconnects =
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<&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>,
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<&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>;
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interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr";
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qcom,icc-path-count = <2>;
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qcom,bus-bw-cfg-count = <9>;
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qcom,bus-bw-cfg =
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/** ICC Path 1 **/
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<0 0>, /* no vote */
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/* idle: 0-18 Mbps snoc/anoc: 100 Mhz ddr: 451.2 MHz */
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<2250 700000>,
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/* low: 18-60 Mbps snoc/anoc: 100 Mhz ddr: 451.2 MHz */
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<7500 700000>,
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/* medium: 60-240 Mbps snoc/anoc: 100 Mhz ddr: 451.2 MHz */
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<30000 700000>,
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/* high: 240-1200 Mbps snoc/anoc: 100 Mhz ddr: 451.2 MHz */
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<100000 700000>,
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/* very high: > 1200 Mbps snoc/anoc: 403 Mhz ddr: 1555 MHz */
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<175000 3000000>,
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/* ultra high: DBS mode snoc/anoc: 403 Mhz ddr: 2092 MHz */
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<175000 3000000>,
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/* super high: DBS mode snoc/anoc: 533 Mhz ddr: 3.2GHz */
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<175000 4000000>,
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/* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz
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* ddr: 547.2 MHz
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*/
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<7500 1500000>,
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/** ICC Path 2 **/
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<0 0>,
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/* ddr: 451.2 MHz */
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<2250 2400000>,
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/* ddr: 451.2 MHz */
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<7500 2400000>,
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/* ddr: 451.2 MHz */
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<30000 2400000>,
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/* ddr: 451.2 MHz */
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<100000 2400000>,
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/* ddr: 1555 MHz */
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<175000 8000000>,
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/* ddr: 2092 MHz */
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<175000 9600000>,
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/* ddr: 3.2 GHz */
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<175000 10000000>,
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/* ddr: 547.2 MHz */
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<7500 2400000>;
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};
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};
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&pcie0_rp {
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#address-cells = <5>;
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#size-cells = <0>;
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cnss_pci: cnss_pci {
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reg = <0 0 0 0 0>;
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qcom,iommu-group = <&cnss_pci_iommu_group>;
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memory-region = <&cnss_wlan_mem>;
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#address-cells = <1>;
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#size-cells = <1>;
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cnss_pci_iommu_group: cnss_pci_iommu_group {
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qcom,iommu-msi-size = <0x1000>;
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qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
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qcom,iommu-dma = "fastmap";
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qcom,iommu-pagetable = "coherent";
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qcom,iommu-faults = "stall-disable", "HUPCF", "no-CFRE",
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"non-fatal";
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};
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};
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};
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