display: Reverse ziyi display changes and add L9S 42 02 0C panel support

Change-Id: Ia401d800a68eb409078bf73ec4acf4085d7ea31b
Signed-off-by: Jens Reidel <adrian@travitia.xyz>
This commit is contained in:
Jens Reidel
2024-04-07 15:34:54 +02:00
committed by Arian
parent 2562f47583
commit 35ffc2c386
4 changed files with 1464 additions and 1 deletions

View File

@@ -38,6 +38,9 @@
qcom,bl-update-flag = "delay_until_first_frame";
qcom,mdss-dsi-panel-mode-switch;
qcom,mdss-dsi-dma-schedule-line = <1>;
qcom,mdss-dsi-dma-schedule-window = <50>;
qcom,mdss-dsi-panel-hdr-enabled;
qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 17000 15500 30000 8000 3000>;
qcom,mdss-dsi-panel-peak-brightness = <4200000>;

View File

@@ -38,6 +38,9 @@
qcom,bl-update-flag = "delay_until_first_frame";
qcom,mdss-dsi-panel-mode-switch;
qcom,mdss-dsi-dma-schedule-line = <1>;
qcom,mdss-dsi-dma-schedule-window = <50>;
qcom,mdss-dsi-panel-hdr-enabled;
qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 17000 15500 30000 8000 3000>;
qcom,mdss-dsi-panel-peak-brightness = <4200000>;

File diff suppressed because it is too large Load Diff

View File

@@ -1,6 +1,10 @@
#include "diwali-sde-display.dtsi"
#include "dsi-panel-l9s-36-02-0b-mp-amoled-dsc-cmd.dtsi"
#include "dsi-panel-l9s-42-02-0a-mp-amoled-dsc-cmd.dtsi"
#include "dsi-panel-l9s-36-02-0b-mp-amoled-dsc-cmd.dtsi"
#include "dsi-panel-l9s-42-02-0c-mp-amoled-dsc-cmd.dtsi"
/delete-node/ &disp_rdump_memory;
&soc {
dsi_panel_pwr_supply_l9s_0a: dsi_panel_pwr_supply_l9s_0a {
@@ -76,8 +80,145 @@
qcom,supply-pre-off-sleep = <4>;
};
};
dsi_panel_pwr_supply_l9s_0c: dsi_panel_pwr_supply_l9s_0c {
#address-cells = <1>;
#size-cells = <0>;
qcom,panel-supply-entry@0 {
reg = <0>;
qcom,supply-name = "vddio";
qcom,supply-min-voltage = <1800000>;
qcom,supply-max-voltage = <1800000>;
qcom,supply-enable-load = <60700>;
qcom,supply-disable-load = <80>;
qcom,supply-post-on-sleep = <10>;
qcom,supply-pre-off-sleep = <6>;
};
qcom,panel-supply-entry@1 {
reg = <1>;
qcom,supply-name = "dvdd";
qcom,supply-min-voltage = <1200000>;
qcom,supply-max-voltage = <1200000>;
qcom,supply-enable-load = <60700>;
qcom,supply-disable-load = <80>;
qcom,supply-post-on-sleep = <10>;
};
qcom,panel-supply-entry@2 {
reg = <2>;
qcom,supply-name = "vdd";
qcom,supply-min-voltage = <3000000>;
qcom,supply-max-voltage = <3000000>;
qcom,supply-enable-load = <100000>;
qcom,supply-disable-load = <0>;
qcom,supply-post-on-sleep = <10>;
qcom,supply-pre-off-sleep = <4>;
};
};
disp_rdump_memory: disp_rdump_region@b8000000 {
reg = <0xb8000000 0x01400000>;
label = "disp_rdump_region";
};
};
&dsi_l9s_42_02_0a_mp_amoled_dsc_cmd {
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
qcom,mdss-dsi-clk-strength = <0xFF>;
qcom,mdss-dsi-display-timings {
/* 60 Hz */
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 1D 07 07 17 22 07
07 08 02 04 00 19 0C];
qcom,display-topology = <1 1 1>;
qcom,default-topology-index = <0>;
};
/* 120 Hz */
timing@1 {
qcom,mdss-dsi-panel-phy-timings = [00 1D 07 07 17 22 07
07 08 02 04 00 19 0C];
qcom,display-topology = <1 1 1>;
qcom,default-topology-index = <0>;
};
/* 90 Hz */
timing@2 {
qcom,mdss-dsi-panel-phy-timings = [00 1D 07 07 17 22 07
07 08 02 04 00 19 0C];
qcom,display-topology = <1 1 1>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_l9s_36_02_0b_mp_amoled_dsc_cmd {
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
qcom,mdss-dsi-clk-strength = <0xFF>;
qcom,mdss-dsi-display-timings {
/* 60 Hz */
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 1D 07 07 17 22 07
07 08 02 04 00 19 0C];
qcom,display-topology = <1 1 1>;
qcom,default-topology-index = <0>;
};
/* 120 Hz */
timing@1 {
qcom,mdss-dsi-panel-phy-timings = [00 1D 07 07 17 22 07
07 08 02 04 00 19 0C];
qcom,display-topology = <1 1 1>;
qcom,default-topology-index = <0>;
};
/* 90 Hz */
timing@2 {
qcom,mdss-dsi-panel-phy-timings = [00 1D 07 07 17 22 07
07 08 02 04 00 19 0C];
qcom,display-topology = <1 1 1>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_l9s_42_02_0c_mp_amoled_dsc_cmd {
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
qcom,mdss-dsi-clk-strength = <0xFF>;
qcom,mdss-dsi-display-timings {
/* 60 Hz */
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 1D 07 07 17 22 07
07 08 02 04 00 19 0C];
qcom,display-topology = <1 1 1>;
qcom,default-topology-index = <0>;
};
/* 120 Hz */
timing@1 {
qcom,mdss-dsi-panel-phy-timings = [00 1D 07 07 17 22 07
07 08 02 04 00 19 0C];
qcom,display-topology = <1 1 1>;
qcom,default-topology-index = <0>;
};
/* 90 Hz */
timing@2 {
qcom,mdss-dsi-panel-phy-timings = [00 1D 07 07 17 22 07
07 08 02 04 00 19 0C];
qcom,display-topology = <1 1 1>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_l9s_42_02_0a_mp_amoled_dsc_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_l9s_0a>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
@@ -106,6 +247,20 @@
qcom,platform-reset-gpio = <&tlmm 42 0>;
};
&dsi_l9s_42_02_0c_mp_amoled_dsc_cmd {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_l9s_0c>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <3>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <4095>;
qcom,mdss-dsi-factory-bl-max-level = <2047>;
qcom,mdss-factory-brightness-max-level = <2047>;
qcom,mdss-brightness-init-level = <307>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-te-gpio = <&tlmm 82 0>;
qcom,platform-reset-gpio = <&tlmm 42 0>;
};
&dsi_nt36672e_fhd_plus_144_video {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply_avdd>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";
@@ -284,6 +439,7 @@
synaptics_tcm@0 {
panel = <&dsi_l9s_42_02_0a_mp_amoled_dsc_cmd
&dsi_l9s_36_02_0b_mp_amoled_dsc_cmd
&dsi_l9s_42_02_0c_mp_amoled_dsc_cmd
&dsi_r66451_amoled_video>;
};
};
@@ -295,11 +451,13 @@
thermal_screen: thermal-screen {
panel = <&dsi_l9s_42_02_0a_mp_amoled_dsc_cmd
&dsi_l9s_36_02_0b_mp_amoled_dsc_cmd
&dsi_l9s_42_02_0c_mp_amoled_dsc_cmd
&dsi_r66451_amoled_video>;
};
charge_screen: charge-screen {
panel = <&dsi_l9s_42_02_0a_mp_amoled_dsc_cmd
&dsi_l9s_36_02_0b_mp_amoled_dsc_cmd
&dsi_l9s_42_02_0a_mp_amoled_dsc_cmd
&dsi_r66451_amoled_video>;
};
};