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https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
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Merge "dt-bindings: devfreq: Add DT bindings for ARM memlat driver"
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bindings/devfreq/arm-memlat-mon.txt
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31
bindings/devfreq/arm-memlat-mon.txt
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@@ -0,0 +1,31 @@
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ARM CPU memory latency monitor device
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arm-memlat-mon is a device that represents the use of the PMU in ARM cores
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to measure the parameters for latency driven memory access patterns.
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Required properties:
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- compatible: Must be "qcom,arm-memlat-mon"
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- qcom,cpulist: List of CPU phandles to be monitored in a cluster
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- qcom,target-dev: The DT device that corresponds to this master port
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- qcom,core-dev-table: A mapping table of core frequency to a required bandwidth vote at the
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given core frequency.
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Optional properties:
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- qcom,cachemiss-ev: The cache miss event that this monitor is supposed to measure.
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Defaults to 0x17 if not specified.
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- qcom,inst-ev: The instruction count event that this monitor is supposed to measure.
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Defaults to 0x08 if not specified.
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Example:
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qcom,arm-memlat-mon {
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compatible = "qcom,arm-memlat-mon";
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qcom,cpulist = <&CPU0 &CPU1>;
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qcom,target-dev = <&memlat0>;
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qcom,cachemiss-ev = <0x2A>;
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qcom,inst-ev = <0x08>;
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qcom,core-dev-table =
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< 300000 1525>,
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< 499200 3143>,
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< 1881600 5859>;
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};
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@@ -5,7 +5,8 @@ can be used to measure the bandwidth of read/write traffic from the BIMC
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master ports. For example, the CPU subsystem sits on one BIMC master port.
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Required properties:
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- compatible: Must be "qcom,bimc-bwmon", "qcom,bimc-bwmon2"
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- compatible: Must be "qcom,bimc-bwmon", "qcom,bimc-bwmon2" or
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"qcom,bimc-bwmon3"
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- reg: Pairs of physical base addresses and region sizes of
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memory mapped registers.
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- reg-names: Names of the bases for the above registers. Expected
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@@ -14,6 +14,7 @@ Required properties:
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Optional properties:
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- polling-ms: Polling interval for the device in milliseconds. Default: 50
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- governor: Initial governor to user for the device. Default: "performance"
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- qcom,prepare-clk: Prepare the device clock during initialization.
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Example:
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