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ARM: dts: msm: Update frequency plan for neo_luna-v2 GPU

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Add support of 843Mhz FMAX for neo_luna-v2 GPU as per recommendations.

Change-Id: Ib7493f08d97881f98cca77614c3a4ddd9d88e5ed
This commit is contained in:
Pankaj Gupta
2022-11-10 22:16:51 +05:30
parent 920938d1c2
commit 42917b07f0
1 changed files with 142 additions and 0 deletions
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142
qcom/neo_luna-v2.dtsi
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@@ -109,6 +109,148 @@
&msm_gpu {
status = "ok";
/* Enable context aware freq. scaling */
qcom,enable-ca-jump;
/* Context aware jump busy penalty in us */
qcom,ca-busy-penalty = <12000>;
/delete-node/ qcom,gpu-pwrlevel-bins;
/*
* Speed-bin zero is default speed bin.
* For rest of the speed bins, speed-bin value
* is calculated as FMAX/4.8 MHz round up to zero
* decimal places plus two margin to account for
* clock jitters.
*/
qcom,gpu-pwrlevel-bins {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,gpu-pwrlevel-bins";
qcom,gpu-pwrlevels-0 {
#address-cells = <1>;
#size-cells = <0>;
qcom,speed-bin = <0>;
qcom,initial-pwrlevel = <5>;
qcom,ca-target-pwrlevel = <4>;
/* TURBO_L1 */
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <843000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
qcom,bus-freq = <11>;
qcom,bus-min = <10>;
qcom,bus-max = <11>;
};
/* TURBO */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <780000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO>;
qcom,bus-freq = <10>;
qcom,bus-min = <9>;
qcom,bus-max = <11>;
};
/* NOM */
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <644000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
qcom,bus-freq = <9>;
qcom,bus-min = <7>;
qcom,bus-max = <11>;
};
/* SVS_L1 */
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <570000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
qcom,bus-freq = <7>;
qcom,bus-min = <5>;
qcom,bus-max = <10>;
};
/* SVS */
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <450000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
qcom,bus-freq = <6>;
qcom,bus-min = <3>;
qcom,bus-max = <8>;
};
/* LOW SVS */
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-freq = <320000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
qcom,bus-freq = <3>;
qcom,bus-min = <2>;
qcom,bus-max = <6>;
};
};
qcom,gpu-pwrlevels-1 {
#address-cells = <1>;
#size-cells = <0>;
qcom,speed-bin = <137>;
qcom,initial-pwrlevel = <3>;
qcom,ca-target-pwrlevel = <2>;
/* NOM */
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <644000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
qcom,bus-freq = <11>;
qcom,bus-min = <8>;
qcom,bus-max = <11>;
};
/* SVS_L1 */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <570000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
qcom,bus-freq = <7>;
qcom,bus-min = <5>;
qcom,bus-max = <10>;
};
/* SVS */
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <450000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
qcom,bus-freq = <6>;
qcom,bus-min = <3>;
qcom,bus-max = <8>;
};
/* LOW SVS */
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <320000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
qcom,bus-freq = <3>;
qcom,bus-min = <2>;
qcom,bus-max = <6>;
};
};
};
};
&kgsl_msm_iommu {