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https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
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ARM: dts: msm: Enable multilevel clock support for cape
Enable multilevel clock support for cape. Change-Id: I4a3d12e01e37006d7908fabb9a271d45ca801405
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@@ -1897,11 +1897,11 @@
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<&clock_gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
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<&clock_gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
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freq-table-hz =
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<75000000 300000000>,
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<75000000 850000000>,
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<0 0>,
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<0 0>,
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<75000000 300000000>,
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<75000000 300000000>,
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<75000000 850000000>,
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<75000000 850000000>,
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<0 0>,
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<0 0>,
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<0 0>,
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@@ -1958,7 +1958,7 @@
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*/
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<1492582 0>, <204800 409600>, /* HS G3 RB L2 KBPs */
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<2915200 0>, <409600 409600>, /* HS G4 RB L2 */
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<7643136 0>, <307200 0>; /* Max. bandwidth */
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<7643136 12000000>, <409600 409600>; /* Max. bandwidth */
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qcom,bus-vector-names = "MIN",
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"PWM_G1_L1", "PWM_G2_L1", "PWM_G3_L1", "PWM_G4_L1",
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@@ -1977,6 +1977,15 @@
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qcom,iommu-dma = "fastmap";
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dma-coherent;
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/* Multilevel clock scaling support for higher ufs clock freq */
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multi-level-clk-scaling-support;
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axi-turbo-clk-freq = <850000000>;
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axi-turbo-l1-clk-freq = <850000000>;
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ice-turbo-clk-freq = <850000000>;
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ice-turbo-l1-clk-freq = <850000000>;
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unipro-turbo-clk-freq = <850000000>;
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unipro-turbo-l1-clk-freq = <850000000>;
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/* CGC bit needs to disable fot target supporting higher ufs clock freq */
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disable-cgc;
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