Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
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ARM: dts: msm: Add RSC, PDC node for ravelin

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This change adds apps_rsc, disp_rsc and pdc device.

Change-Id: I5941f4efc2a60677bbd602e934690d8a61ad5671
This commit is contained in:
Tushar Nimkar
2022-08-18 11:36:23 +05:30
parent e07102c2b5
commit 458f54cb7c
3 changed files with 52 additions and 0 deletions
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1
qcom/ravelin-pinctrl.dtsi
View File

@@ -7,6 +7,7 @@
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
wakeup-parent = <&pdc>;
qupv3_se2_2uart_pins: qupv3_se2_2uart_pins {
qupv3_se2_2uart_tx_active: qupv3_se2_2uart_tx_active {

4
qcom/ravelin-rumi.dtsi
View File

@@ -30,6 +30,10 @@
};
};
&disp_rsc {
status = "nok";
};
&usb0 {
dwc3@a600000 {
usb-phy = <&usb_emuphy>, <&usb_nop_phy>;

47
qcom/ravelin.dtsi
View File

@@ -4,6 +4,7 @@
#include <dt-bindings/clock/qcom,dispcc-ravelin.h>
#include <dt-bindings/clock/qcom,gcc-ravelin.h>
#include <dt-bindings/clock/qcom,gpucc-ravelin.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/soc/qcom,ipcc.h>
#include <dt-bindings/gpio/gpio.h>
@@ -258,6 +259,52 @@
clock-frequency = <19200000>;
};
apps_rsc: rsc@17a00000 {
label = "apps_rsc";
compatible = "qcom,rpmh-rsc";
reg = <0x17a00000 0x10000>,
<0x17a10000 0x10000>,
<0x17a20000 0x10000>;
reg-names = "drv-0", "drv-1", "drv-2";
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
qcom,tcs-offset = <0xd00>;
qcom,drv-id = <2>;
qcom,tcs-config = <ACTIVE_TCS 2>,
<SLEEP_TCS 3>,
<WAKE_TCS 3>,
<CONTROL_TCS 0>,
<FAST_PATH_TCS 0>;
};
disp_rsc: rsc@af20000 {
lable = "disp_rsc";
compatible = "qcom,rpmh-rsc";
reg = <0xaf20000 0x10000>;
reg-names = "drv-0";
interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&dispcc DISP_CC_MDSS_RSCC_AHB_CLK>;
qcom,tcs-offset = <0x1c00>;
qcom,drv-id = <0>;
qcom,tcs-config = <ACTIVE_TCS 0>,
<SLEEP_TCS 1>,
<WAKE_TCS 1>,
<CONTROL_TCS 0>,
<FAST_PATH_TCS 0>;
};
pdc: interrupt-controller@b220000 {
compatible = "qcom,ravelin-pdc", "qcom,pdc";
reg = <0xb220000 0x30000>, <0x174000f0 0x64>;
reg-names = "pdc-interrupt-base", "apps-shared-spi-cfg";
qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>,
<126 716 12>;
#interrupt-cells = <2>;
interrupt-parent = <&intc>;
interrupt-controller;
};
memtimer: timer@17420000 {
#address-cells = <1>;
#size-cells = <1>;