Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
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ARM: dts: msm: Swap interconnect masters

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Correct smmu interconnect property.

Change-Id: Ifba799a82ea14e9245dae15001cb6f17c9459681
This commit is contained in:
Patrick Daly
2020-08-06 10:28:15 -07:00
parent c443f51173
commit 493897f550
1 changed files with 6 additions and 6 deletions
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12
qcom/msm-arm-smmu-sdxlemur.dtsi
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@@ -47,8 +47,8 @@
<GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
interconnects = <&system_noc MASTER_APPSS_PROC
&mem_noc SLAVE_IMEM_CFG>;
interconnects = <&mem_noc MASTER_APPSS_PROC
&system_noc SLAVE_IMEM_CFG>;
qcom,active-only;
periph_tbu: periph_tbu@15045000 {
@@ -57,8 +57,8 @@
<0x15042200 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x0 0x400>;
interconnects = <&system_noc MASTER_APPSS_PROC
&mem_noc SLAVE_IMEM_CFG>;
interconnects = <&mem_noc MASTER_APPSS_PROC
&system_noc SLAVE_IMEM_CFG>;
qcom,active-only;
};
@@ -68,8 +68,8 @@
<0x15042208 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x400 0x400>;
interconnects = <&system_noc MASTER_APPSS_PROC
&mem_noc SLAVE_IMEM_CFG>;
interconnects = <&mem_noc MASTER_APPSS_PROC
&system_noc SLAVE_IMEM_CFG>;
qcom,active-only;
};
};