Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
2
0
Fork 0
mirror of https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees synced 2026-02-01 08:51:30 +00:00
Code Issues Packages Projects Releases Wiki Activity

dt-bindings: clocks: Add gpu cc clock controller bindings for Lahaina

Browse Source 
Add gpu cc clock controller bindings to support Lahaina.

Change-Id: I3dcf3ba271393b5880970ca056c870c6a173b63c
This commit is contained in:
Vivek Aknurwar
2019-10-03 21:54:20 -07:00
parent 4cefd27db8
commit 570a1683db
1 changed files with 18 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
bindings/clock/qcom,gpucc.txt
View File

@@ -1,11 +1,16 @@
Qualcomm Graphics Clock & Reset Controller Binding
--------------------------------------------------
Qualcomm Technologies, Inc. Graphics Clock & Reset Controller Binding
--------------------------------------------------------------------
Required properties :
- compatible : shall contain "qcom,sdm845-gpucc" or "qcom,msm8998-gpucc"
- reg : shall contain base register location and length
- compatible : shall contain "qcom,sdm845-gpucc" or "qcom,msm8998-gpucc",
"qcom,lahaina-gpucc.
- reg: shall contain base register offset and size.
- reg-names: names of registers listed in the same order as in the reg property.
Must contain "cc_base".
- #clock-cells : from common clock binding, shall contain 1
- #reset-cells : from common reset binding, shall contain 1
Optional properties :
- #power-domain-cells : from generic power domain binding, shall contain 1
- clocks : shall contain the XO clock
shall contain the gpll0 out main clock (msm8998)
@@ -13,6 +18,7 @@ Required properties :
shall be "gpll0" (msm8998)
Example:
1.
gpucc: clock-controller@5090000 {
compatible = "qcom,sdm845-gpucc";
reg = <0x5090000 0x9000>;
@@ -22,3 +28,11 @@ Example:
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
};
2.
clock_gpucc: clock-controller@3d90000 {
compatible = "qcom,lahaina-gpucc";
reg = <0x3d90000 0x9000>;
reg-names = "cc_base";
#clock-cells = <1>;
#reset-cells = <1>;
};