Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
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Merge "ARM: dts: msm: add capacity and DPC properties for anorak"

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qctecmdr
2022-07-19 11:29:43 -07:00
committed by Gerrit - the friendly Code Review server
parent 7cb1660c01 7e88dd7eb1
commit 5775c8e7af
1 changed files with 17 additions and 0 deletions
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17
qcom/anorak.dtsi
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@@ -54,6 +54,8 @@
reg = <0x0 0x0>;
enable-method = "psci";
next-level-cache = <&L2_0>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
L2_0: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@@ -72,6 +74,8 @@
reg = <0x0 0x100>;
enable-method = "psci";
next-level-cache = <&L2_1>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
L2_1: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@@ -86,6 +90,8 @@
reg = <0x0 0x200>;
enable-method = "psci";
next-level-cache = <&L2_2>;
capacity-dmips-mhz = <1075>;
dynamic-power-coefficient = <109>;
L2_2: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@@ -99,6 +105,8 @@
reg = <0x0 0x300>;
enable-method = "psci";
next-level-cache = <&L2_3>;
capacity-dmips-mhz = <1075>;
dynamic-power-coefficient = <109>;
L2_3: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@@ -113,6 +121,8 @@
reg = <0x0 0x400>;
enable-method = "psci";
next-level-cache = <&L2_4>;
capacity-dmips-mhz = <1075>;
dynamic-power-coefficient = <109>;
L2_4: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@@ -126,6 +136,8 @@
reg = <0x0 0x500>;
enable-method = "psci";
next-level-cache = <&L2_5>;
capacity-dmips-mhz = <1075>;
dynamic-power-coefficient = <109>;
L2_5: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@@ -638,6 +650,11 @@
cap-based-alloc-and-pwr-collapse;
};
hyp_core_ctl: qcom,hyp-core-ctl {
compatible = "qcom,hyp-core-ctl";
status = "ok";
};
rpmhcc: qcom,rpmhcc {
compatible = "qcom,dummycc";
clock-output-names = "rpmhcc_clocks";