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ARM: dts: msm: Enable L1SS sleep for Lahaina-v2.1
PCIe0 phy on v2.1 manages the phy PLL properly hence remove the software workaround to keep the phy PLL always on. Change-Id: Ia32cebb53b6873b2c9f3b07299eb3208c5b5a77c
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@@ -7,6 +7,7 @@
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};
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&pcie0 {
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qcom,l1ss-sleep-disable = <0x0>;
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qcom,pcie-phy-ver = <21100>;
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qcom,phy-sequence = <0x0240 0x03 0x0
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0x0094 0x08 0x0
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