Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
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Merge "ARM: dts: msm: Remove redundant change from Diwali"

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qctecmdr
2021-10-29 03:13:18 -07:00
committed by Gerrit - the friendly Code Review server
parent e3c6a366f3 d7a57527c7
commit 643a146bc6
1 changed files with 1 additions and 8 deletions
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9
qcom/diwali.dtsi
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@@ -25,7 +25,7 @@
chosen: chosen {
stdout-path = "/soc/qcom,qup_uart@994000:115200n8";
bootargs = "console=ttyMSM0,115200n8 loglevel=8 log_buf_len=256K kernel.panic_on_rcu_stall=1 loop.max_part=7 pcie_ports=compat service_locator.enable=1 msm_rtb.filter=0x237 allow_mismatched_32bit_el0 kasan=off rcupdate.rcu_expedited=1 rcu_nocbs=0-7 ftrace_dump_on_oops pstore.compress=none";
bootargs = "console=ttyMSM0,115200n8 loglevel=8 log_buf_len=256K kernel.panic_on_rcu_stall=1 loop.max_part=7 pcie_ports=compat msm_rtb.filter=0x237 allow_mismatched_32bit_el0 kasan=off rcupdate.rcu_expedited=1 rcu_nocbs=0-7 ftrace_dump_on_oops pstore.compress=none";
};
memory { device_type = "memory"; reg = <0 0 0 0>; };
@@ -511,13 +511,6 @@
qcom,gpios-reserved = <32 33 34 35>;
};
wdog: qcom,wdt@17410000 {
compatible = "qcom,msm-watchdog";
reg = <0x17410000 0x1000>;
reg-names = "wdt-base";
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
};
arch_timer: timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,