ARM: dts: msm: Add nopmi support for diwali

Add nopmi support for IDP and QRD platforms on diwali.

Change-Id: Ife49363d3a4cda2e5b86790cdab169432850ac77
This commit is contained in:
Ashish Chavan
2021-10-27 18:52:49 +05:30
parent 841ea8d491
commit 650bcaaee9
31 changed files with 412 additions and 342 deletions

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@@ -8,4 +8,6 @@
compatible = "qcom,diwali-atp", "qcom,diwali", "qcom,atp";
qcom,msm-id = <506 0x10000>;
qcom,board-id = <33 0>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2E>;
};

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@@ -7,4 +7,6 @@
model = "Qualcomm Technologies, Inc. Diwali ATP";
compatible = "qcom,diwali-atp", "qcom,diwali", "qcom,atp";
qcom,board-id = <33 0>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2E>;
};

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@@ -1,6 +1,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "diwali-pm7250b.dtsi"
#include "diwali-pmic-overlay.dtsi"
&soc {

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@@ -6,4 +6,6 @@
model = "Qualcomm Technologies, Inc. Diwali HSP SoC";
compatible = "qcom,diwali";
qcom,board-id = <0 2>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2E>;
};

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@@ -8,4 +8,6 @@
compatible = "qcom,diwali-idp", "qcom,diwali", "qcom,idp";
qcom,msm-id = <506 0x10000>;
qcom,board-id = <34 3>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2E>;
};

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@@ -7,4 +7,6 @@
model = "Qualcomm Technologies, Inc. Diwali IDP AMOLED";
compatible = "qcom,diwali-idp", "qcom,diwali", "qcom,idp";
qcom,board-id = <34 3>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2E>;
};

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@@ -1,4 +1,5 @@
#include "diwali-idp.dtsi"
#include "diwali-idp-pm7250b.dtsi"
&soc {
};

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@@ -8,4 +8,6 @@
compatible = "qcom,diwali-idp", "qcom,diwali", "qcom,idp";
qcom,msm-id = <506 0x10000>;
qcom,board-id = <34 2>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2E>;
};

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@@ -7,4 +7,6 @@
model = "Qualcomm Technologies, Inc. Diwali IDP + HSP";
compatible = "qcom,diwali-idp", "qcom,diwali", "qcom,idp";
qcom,board-id = <34 2>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2E>;
};

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@@ -1,4 +1,5 @@
#include "diwali-idp.dtsi"
#include "diwali-idp-pm7250b.dtsi"
&soc {
};

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@@ -1,11 +1,13 @@
/dts-v1/;
/plugin/;
#include "diwali-idp-nopmi.dtsi"
#include "diwali-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Diwali IDP NOPMI";
compatible = "qcom,diwali-idp", "qcom,diwali", "qcom,idp";
qcom,msm-id = <506 0x10000>;
qcom,board-id = <34 0>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
};

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@@ -1,10 +1,12 @@
/dts-v1/;
#include "diwali.dtsi"
#include "diwali-idp-nopmi.dtsi"
#include "diwali-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Diwali IDP NOPMI";
compatible = "qcom,diwali-idp", "qcom,diwali", "qcom,idp";
qcom,board-id = <34 0>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
};

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@@ -1,2 +0,0 @@
&soc {
};

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@@ -2,10 +2,13 @@
/plugin/;
#include "diwali-idp.dtsi"
#include "diwali-idp-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Diwali IDP";
compatible = "qcom,diwali-idp", "qcom,diwali", "qcom,idp";
qcom,msm-id = <506 0x10000>;
qcom,board-id = <34 0>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2E>;
};

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@@ -0,0 +1,5 @@
#include "diwali-pm7250b.dtsi"
&battery_charger {
qcom,thermal-mitigation = <3000000 1500000 1000000 500000>;
};

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@@ -8,4 +8,6 @@
compatible = "qcom,diwali-idp", "qcom,diwali", "qcom,idp";
qcom,msm-id = <506 0x10000>;
qcom,board-id = <34 1>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2E>;
};

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@@ -7,4 +7,6 @@
model = "Qualcomm Technologies, Inc. Diwali IDP USBC audio";
compatible = "qcom,diwali-idp", "qcom,diwali", "qcom,idp";
qcom,board-id = <34 1>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2E>;
};

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@@ -1,2 +1,5 @@
#include "diwali-idp.dtsi"
#include "diwali-idp-pm7250b.dtsi"
&soc {
};

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@@ -2,9 +2,12 @@
#include "diwali.dtsi"
#include "diwali-idp.dtsi"
#include "diwali-idp-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Diwali IDP";
compatible = "qcom,diwali-idp", "qcom,diwali", "qcom,idp";
qcom,board-id = <34 0>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2E>;
};

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@@ -23,10 +23,6 @@
};
};
&battery_charger {
qcom,thermal-mitigation = <3000000 1500000 1000000 500000>;
};
&qupv3_se0_i2c {
#address-cells = <1>;
#size-cells = <0>;

347
qcom/diwali-pm7250b.dtsi Normal file
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@@ -0,0 +1,347 @@
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/thermal/thermal_qti.h>
#include "pm7250b.dtsi"
&soc {
qcom,pmic_glink {
status = "okay";
};
qcom,pmic_glink_log {
compatible = "qcom,pmic-glink";
qcom,pmic-glink-channel = "PMIC_LOGS_ADSP_APPS";
qcom,battery_debug {
compatible = "qcom,battery-debug";
};
qcom,charger_ulog_glink {
compatible = "qcom,charger-ulog-glink";
};
spmi_glink_debug: qcom,spmi_glink_debug {
compatible = "qcom,spmi-glink-debug";
#address-cells = <1>;
#size-cells = <0>;
depends-on-supply = <&spmi1_bus>;
/* Primary SPMI bus */
spmi@0 {
reg = <0>;
#address-cells = <2>;
#size-cells = <0>;
qcom,pm7250b-debug@8 {
compatible = "qcom,spmi-pmic";
reg = <8 SPMI_USID>;
qcom,can-sleep;
};
};
/* Secondary SPMI bus */
spmi@1 {
reg = <1>;
#address-cells = <2>;
#size-cells = <0>;
smb1394_glink_debug: qcom,smb1394-debug@9 {
compatible = "qcom,spmi-pmic";
reg = <9 SPMI_USID>;
qcom,can-sleep;
};
qcom,smb1394-debug@b {
compatible = "qcom,spmi-pmic";
reg = <11 SPMI_USID>;
qcom,can-sleep;
};
qcom,smb1394-debug@d {
compatible = "qcom,spmi-pmic";
reg = <12 SPMI_USID>;
qcom,can-sleep;
};
};
};
};
};
&glink_edge {
qcom,pmic_glink_rpmsg {
qcom,glink-channels = "PMIC_RTR_ADSP_APPS";
};
qcom,pmic_glink_log_rpmsg {
qcom,glink-channels = "PMIC_LOGS_ADSP_APPS";
qcom,intents = <0x800 5
0xc00 3
0x2000 1>;
};
};
&spmi0_debug_bus {
depends-on2-supply = <&smb1394_glink_debug>;
};
&thermal_zones {
socd {
cooling-maps {
socd_apc1 {
trip = <&socd_trip>;
cooling-device = <&APC1_pause 1 1>;
};
socd_cdsp1 {
trip = <&socd_trip>;
cooling-device = <&cdsp_sw 4 4>;
};
socd_gpu0 {
trip = <&socd_trip>;
cooling-device = <&msm_gpu 2 2>;
};
};
};
pm7250b-ibat-lvl0 {
trips {
ibat-lvl0 {
temperature = <6000>;
};
};
};
pm7250b-ibat-lvl1 {
trips {
ibat-lvl1 {
temperature = <7500>;
};
};
};
pm8350b-bcl-lvl0 {
cooling-maps {
vbat_lte0 {
trip = <&b_bcl_lvl0>;
cooling-device = <&modem_lte_dsc 8 8>;
};
vbat_nr0_scg {
trip = <&b_bcl_lvl0>;
cooling-device = <&modem_nr_scg_dsc 3 3>;
};
vbat_nr0 {
trip = <&b_bcl_lvl0>;
cooling-device = <&modem_nr_dsc 6 6>;
};
vbat_cdsp0 {
trip = <&b_bcl_lvl0>;
cooling-device = <&cdsp_sw 2 2>;
};
vbat_cpu_5 {
trip = <&b_bcl_lvl0>;
cooling-device = <&cpu5_pause 1 1>;
};
vbat_gpu0 {
trip = <&b_bcl_lvl0>;
cooling-device = <&msm_gpu 1 1>;
};
};
};
pm8350b-bcl-lvl1 {
cooling-maps {
vbat_lte1 {
trip = <&b_bcl_lvl1>;
cooling-device = <&modem_lte_dsc 10 10>;
};
vbat_nr1_scg {
trip = <&b_bcl_lvl1>;
cooling-device = <&modem_nr_scg_dsc 10 10>;
};
vbat_nr1 {
trip = <&b_bcl_lvl1>;
cooling-device = <&modem_nr_dsc 9 9>;
};
vbat_cdsp1 {
trip = <&b_bcl_lvl1>;
cooling-device = <&cdsp_sw 4 4>;
};
vbat_cpu_6_7 {
trip = <&b_bcl_lvl1>;
cooling-device = <&cpu_6_7_pause 1 1>;
};
vbat_gpu1 {
trip = <&b_bcl_lvl1>;
cooling-device = <&msm_gpu 2 2>;
};
};
};
pm8350b-bcl-lvl2 {
cooling-maps {
vbat_cdsp2 {
trip = <&b_bcl_lvl2>;
cooling-device = <&cdsp_sw 5 THERMAL_NO_LIMIT>;
};
vbat_gpu2 {
trip = <&b_bcl_lvl2>;
cooling-device = <&msm_gpu 3 THERMAL_NO_LIMIT>;
};
};
};
conn-therm {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&pm7250b_vadc ADC5_AMUX_THM3_100K_PU>;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
chg-skin-therm {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&pm7250b_vadc ADC5_AMUX_THM1_100K_PU>;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
};
&battery_charger {
status = "okay";
};
&ucsi {
status = "okay";
};
&altmode {
status = "okay";
};
&pm7250b_clkdiv {
clocks = <&rpmhcc RPMH_CXO_CLK>;
};
&spmi0_debug_bus {
qcom,pm7250b-debug@8 {
compatible = "qcom,spmi-pmic";
reg = <8 SPMI_USID>;
#address-cells = <2>;
#size-cells = <0>;
qcom,can-sleep;
};
qcom,pm7250b-debug@9 {
compatible = "qcom,spmi-pmic";
reg = <9 SPMI_USID>;
#address-cells = <2>;
#size-cells = <0>;
qcom,can-sleep;
};
};
&spmi_glink_debug {
spmi@0 {
qcom,pm7250b-debug@8 {
compatible = "qcom,spmi-pmic";
reg = <8 SPMI_USID>;
qcom,can-sleep;
};
};
};
&pm7250b_2 {
/* Slave ID - 8 */
reg = <8 SPMI_USID>;
};
&pm7250b_3 {
/* Slave ID - 9 */
reg = <9 SPMI_USID>;
};
&pm7250b_vadc {
interrupts = <0x8 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
smb1390_therm@e {
qcom,scale-fn-type = <ADC_SCALE_HW_CALIB_PM5_SMB1398_TEMP>;
};
pm7250b_usb_conn_therm {
reg = <ADC5_AMUX_THM3_100K_PU>;
label = "pm7250b_usb_conn_therm";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
pm7250b_smb_skin_therm {
reg = <ADC5_AMUX_THM1_100K_PU>;
label = "pm7250b_smb_skin_therm";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
};
&pm7250b_adc_tm {
interrupts = <0x8 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
io-channels = <&pm7250b_vadc ADC5_AMUX_THM3_100K_PU>,
<&pm7250b_vadc ADC5_AMUX_THM1_100K_PU>;
pm7250b_usb_conn_therm {
reg = <ADC5_AMUX_THM3_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
};
pm7250b_smb_skin_therm {
reg = <ADC5_AMUX_THM1_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
};
};
&pm7250b_tz {
interrupts = <0x8 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
};
&pm7250b_bcl {
interrupts = <0x8 0x1d 0x0 IRQ_TYPE_EDGE_RISING>,
<0x8 0x1d 0x1 IRQ_TYPE_EDGE_RISING>,
<0x8 0x1d 0x2 IRQ_TYPE_EDGE_RISING>;
};
&pm7250b_charger {
status = "disabled";
};
&pm7250b_qg {
status = "disabled";
};
&pm7250b_pdphy {
status = "disabled";
};

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@@ -1,17 +1,10 @@
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include "pmk8350.dtsi"
#include "pm8350c.dtsi"
#include "pm7325.dtsi"
#include "pmr735a.dtsi"
#include "pm7250b.dtsi"
&pm7250b_clkdiv {
clocks = <&rpmhcc RPMH_CXO_CLK>;
};
&pm8350c_gpios {
pm8010i_reset {
@@ -35,34 +28,6 @@
};
};
&spmi0_debug_bus {
qcom,pm7250b-debug@8 {
compatible = "qcom,spmi-pmic";
reg = <8 SPMI_USID>;
#address-cells = <2>;
#size-cells = <0>;
qcom,can-sleep;
};
qcom,pm7250b-debug@9 {
compatible = "qcom,spmi-pmic";
reg = <9 SPMI_USID>;
#address-cells = <2>;
#size-cells = <0>;
qcom,can-sleep;
};
};
&spmi_glink_debug {
spmi@0 {
qcom,pm7250b-debug@8 {
compatible = "qcom,spmi-pmic";
reg = <8 SPMI_USID>;
qcom,can-sleep;
};
};
};
&pmk8350 {
/delete-node/ pon_pbs@800;
/delete-node/ pon_hlos@1300;
@@ -200,40 +165,6 @@
};
};
&pm7250b_2 {
/* Slave ID - 8 */
reg = <8 SPMI_USID>;
};
&pm7250b_3 {
/* Slave ID - 9 */
reg = <9 SPMI_USID>;
};
&pm7250b_vadc {
interrupts = <0x8 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
smb1390_therm@e {
qcom,scale-fn-type = <ADC_SCALE_HW_CALIB_PM5_SMB1398_TEMP>;
};
pm7250b_usb_conn_therm {
reg = <ADC5_AMUX_THM3_100K_PU>;
label = "pm7250b_usb_conn_therm";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
pm7250b_smb_skin_therm {
reg = <ADC5_AMUX_THM1_100K_PU>;
label = "pm7250b_smb_skin_therm";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
};
&pm7325_tz {
io-channels = <&pmk8350_vadc PM7325_ADC7_DIE_TEMP>;
io-channel-names = "thermal";
@@ -282,25 +213,6 @@
};
};
&pm7250b_adc_tm {
interrupts = <0x8 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
io-channels = <&pm7250b_vadc ADC5_AMUX_THM3_100K_PU>,
<&pm7250b_vadc ADC5_AMUX_THM1_100K_PU>;
pm7250b_usb_conn_therm {
reg = <ADC5_AMUX_THM3_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
};
pm7250b_smb_skin_therm {
reg = <ADC5_AMUX_THM1_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
};
};
&thermal_zones {
skin-msm-therm {
polling-delay-passive = <0>;
@@ -341,32 +253,6 @@
};
};
conn-therm {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&pmk8350_vadc ADC5_AMUX_THM3_100K_PU>;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
chg-skin-therm {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&pmk8350_vadc ADC5_AMUX_THM1_100K_PU>;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
xo-therm {
polling-delay-passive = <0>;
polling-delay = <0>;
@@ -622,25 +508,3 @@
};
};
};
&pm7250b_tz {
interrupts = <0x8 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
};
&pm7250b_bcl {
interrupts = <0x8 0x1d 0x0 IRQ_TYPE_EDGE_RISING>,
<0x8 0x1d 0x1 IRQ_TYPE_EDGE_RISING>,
<0x8 0x1d 0x2 IRQ_TYPE_EDGE_RISING>;
};
&pm7250b_charger {
status = "disabled";
};
&pm7250b_qg {
status = "disabled";
};
&pm7250b_pdphy {
status = "disabled";
};

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@@ -1,11 +1,13 @@
/dts-v1/;
/plugin/;
#include "diwali-qrd-nopmi.dtsi"
#include "diwali-qrd.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Diwali QRD NOPMI";
compatible = "qcom,diwali-qrd", "qcom,diwali", "qcom,qrd";
qcom,msm-id = <506 0x10000>;
qcom,board-id = <0x1000B 0>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
};

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@@ -1,10 +1,12 @@
/dts-v1/;
#include "diwali.dtsi"
#include "diwali-qrd-nopmi.dtsi"
#include "diwali-qrd.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Diwali QRD NOPMI";
compatible = "qcom,diwali-qrd", "qcom,diwali", "qcom,qrd";
qcom,board-id = <0x1000B 0>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
};

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@@ -1,2 +0,0 @@
&soc {
};

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@@ -2,10 +2,13 @@
/plugin/;
#include "diwali-qrd.dtsi"
#include "diwali-qrd-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Diwali QRD";
compatible = "qcom,diwali-qrd", "qcom,diwali", "qcom,qrd";
qcom,msm-id = <506 0x10000>;
qcom,board-id = <0x1000B 0>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2E>;
};

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@@ -0,0 +1,8 @@
#include "diwali-pm7250b.dtsi"
&battery_charger {
qcom,thermal-mitigation = <11500000 11000000 10500000 10000000 9500000
9000000 8500000 8000000 7500000 7000000 6500000
6000000 5500000 5000000 4500000 4000000 3500000
3000000 2500000 2000000 1500000 1000000 500000>;
};

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@@ -2,9 +2,12 @@
#include "diwali.dtsi"
#include "diwali-qrd.dtsi"
#include "diwali-qrd-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Diwali QRD";
compatible = "qcom,diwali-qrd", "qcom,diwali", "qcom,qrd";
qcom,board-id = <0x1000B 0>;
qcom,pmic-id-size = <9>;
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2E>;
};

View File

@@ -28,10 +28,3 @@
};
};
};
&battery_charger {
qcom,thermal-mitigation = <11500000 11000000 10500000 10000000 9500000
9000000 8500000 8000000 7500000 7000000 6500000
6000000 5500000 5000000 4500000 4000000 3500000
3000000 2500000 2000000 1500000 1000000 500000>;
};

View File

@@ -1,123 +1,6 @@
#include <dt-bindings/thermal/thermal_qti.h>
&thermal_zones {
socd {
cooling-maps {
socd_apc1 {
trip = <&socd_trip>;
cooling-device = <&APC1_pause 1 1>;
};
socd_cdsp1 {
trip = <&socd_trip>;
cooling-device = <&cdsp_sw 4 4>;
};
socd_gpu0 {
trip = <&socd_trip>;
cooling-device = <&msm_gpu 2 2>;
};
};
};
pm7250b-ibat-lvl0 {
trips {
ibat-lvl0 {
temperature = <6000>;
};
};
};
pm7250b-ibat-lvl1 {
trips {
ibat-lvl1 {
temperature = <7500>;
};
};
};
pm8350b-bcl-lvl0 {
cooling-maps {
vbat_lte0 {
trip = <&b_bcl_lvl0>;
cooling-device = <&modem_lte_dsc 8 8>;
};
vbat_nr0_scg {
trip = <&b_bcl_lvl0>;
cooling-device = <&modem_nr_scg_dsc 3 3>;
};
vbat_nr0 {
trip = <&b_bcl_lvl0>;
cooling-device = <&modem_nr_dsc 6 6>;
};
vbat_cdsp0 {
trip = <&b_bcl_lvl0>;
cooling-device = <&cdsp_sw 2 2>;
};
vbat_cpu_5 {
trip = <&b_bcl_lvl0>;
cooling-device = <&cpu5_pause 1 1>;
};
vbat_gpu0 {
trip = <&b_bcl_lvl0>;
cooling-device = <&msm_gpu 1 1>;
};
};
};
pm8350b-bcl-lvl1 {
cooling-maps {
vbat_lte1 {
trip = <&b_bcl_lvl1>;
cooling-device = <&modem_lte_dsc 10 10>;
};
vbat_nr1_scg {
trip = <&b_bcl_lvl1>;
cooling-device = <&modem_nr_scg_dsc 10 10>;
};
vbat_nr1 {
trip = <&b_bcl_lvl1>;
cooling-device = <&modem_nr_dsc 9 9>;
};
vbat_cdsp1 {
trip = <&b_bcl_lvl1>;
cooling-device = <&cdsp_sw 4 4>;
};
vbat_cpu_6_7 {
trip = <&b_bcl_lvl1>;
cooling-device = <&cpu_6_7_pause 1 1>;
};
vbat_gpu1 {
trip = <&b_bcl_lvl1>;
cooling-device = <&msm_gpu 2 2>;
};
};
};
pm8350b-bcl-lvl2 {
cooling-maps {
vbat_cdsp2 {
trip = <&b_bcl_lvl2>;
cooling-device = <&cdsp_sw 5 THERMAL_NO_LIMIT>;
};
vbat_gpu2 {
trip = <&b_bcl_lvl2>;
cooling-device = <&msm_gpu 3 THERMAL_NO_LIMIT>;
};
};
};
pm8350c-bcl-lvl0 {
cooling-maps {
vph_lte0 {

View File

@@ -1292,17 +1292,6 @@
qcom,glink-channels = "fastrpcglink-apps-dsp";
qcom,intents = <0x64 64>;
};
qcom,pmic_glink_rpmsg {
qcom,glink-channels = "PMIC_RTR_ADSP_APPS";
};
qcom,pmic_glink_log_rpmsg {
qcom,glink-channels = "PMIC_LOGS_ADSP_APPS";
qcom,intents = <0x800 5
0xc00 3
0x2000 1>;
};
};
};
@@ -2157,7 +2146,6 @@
#address-cells = <2>;
#size-cells = <0>;
depends-on-supply = <&spmi1_bus>;
depends-on2-supply = <&smb1394_glink_debug>;
qcom,pmk8350-debug@0 {
compatible = "qcom,spmi-pmic";
@@ -2206,76 +2194,22 @@
qcom,subsys-name = "lpass";
qcom,protection-domain = "tms/servreg", "msm/adsp/charger_pd";
depends-on-supply = <&ipcc_mproc>;
status = "disabled";
battery_charger: qcom,battery_charger {
compatible = "qcom,battery-charger";
status = "disabled";
};
ucsi: qcom,ucsi {
compatible = "qcom,ucsi-glink";
status = "disabled";
};
altmode: qcom,altmode {
compatible = "qcom,altmode-glink";
#altmode-cells = <1>;
};
};
qcom,pmic_glink_log {
compatible = "qcom,pmic-glink";
qcom,pmic-glink-channel = "PMIC_LOGS_ADSP_APPS";
qcom,battery_debug {
compatible = "qcom,battery-debug";
};
qcom,charger_ulog_glink {
compatible = "qcom,charger-ulog-glink";
};
spmi_glink_debug: qcom,spmi_glink_debug {
compatible = "qcom,spmi-glink-debug";
#address-cells = <1>;
#size-cells = <0>;
depends-on-supply = <&spmi1_bus>;
/* Primary SPMI bus */
spmi@0 {
reg = <0>;
#address-cells = <2>;
#size-cells = <0>;
qcom,pm7250b-debug@8 {
compatible = "qcom,spmi-pmic";
reg = <8 SPMI_USID>;
qcom,can-sleep;
};
};
/* Secondary SPMI bus */
spmi@1 {
reg = <1>;
#address-cells = <2>;
#size-cells = <0>;
smb1394_glink_debug: qcom,smb1394-debug@9 {
compatible = "qcom,spmi-pmic";
reg = <9 SPMI_USID>;
qcom,can-sleep;
};
qcom,smb1394-debug@b {
compatible = "qcom,spmi-pmic";
reg = <11 SPMI_USID>;
qcom,can-sleep;
};
qcom,smb1394-debug@d {
compatible = "qcom,spmi-pmic";
reg = <12 SPMI_USID>;
qcom,can-sleep;
};
};
status = "disabled";
};
};
};