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https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
synced 2026-02-01 04:59:05 +00:00
ARM: dts: msm: Add thermalzones for wcss_cx cold temperature handling
Add thermalzone support for handling cold temperature for wcss_cx rail for parrot chipset. Change-Id: Idea6a92f8d58a37320b8f36fbe9515e2eaaa38f1
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@@ -32,6 +32,13 @@
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qcom,init-voltage-level =
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<RPMH_REGULATOR_LEVEL_RETENTION>;
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};
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cx_cdev: regulator-cdev {
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compatible = "qcom,rpmh-reg-cdev";
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mboxes = <&qmp_aop 0>;
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qcom,reg-resource-name = "cx";
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#cooling-cells = <2>;
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};
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};
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rpmh-regulator-gfxlvl {
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@@ -11,8 +11,9 @@
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<0x0c222000 0x1ff>; /* SROT */
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#qcom,sensors = <16>;
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interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "uplow","critical";
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<GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 500 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "uplow","critical", "cold";
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#thermal-sensor-cells = <1>;
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};
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@@ -22,8 +23,9 @@
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<0x0c223000 0x1ff>; /* SROT */
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#qcom,sensors = <16>;
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interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "uplow","critical";
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<GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 501 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "uplow","critical", "cold";
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#thermal-sensor-cells = <1>;
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};
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@@ -1078,4 +1080,56 @@
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};
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};
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};
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zeroc-0-step {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-sensors = <&tsens0 128>;
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trips {
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thermal-engine-config {
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temperature = <1>;
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hysteresis = <1>;
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type = "passive";
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};
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min_temp_0_trip: cold-trip {
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temperature = <1>;
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hysteresis = <1>;
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type = "passive";
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};
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};
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cooling-maps {
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wcss_cx_vdd_cdev {
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trip = <&min_temp_0_trip>;
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cooling-device = <&cx_cdev 1 1>;
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};
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};
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};
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zeroc-1-step {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-sensors = <&tsens1 128>;
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trips {
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thermal-engine-config {
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temperature = <1>;
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hysteresis = <1>;
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type = "passive";
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};
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min_temp_1_trip: cold-trip {
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temperature = <1>;
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hysteresis = <1>;
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type = "passive";
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};
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};
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cooling-maps {
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wcss_cx_vdd_cdev {
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trip = <&min_temp_1_trip>;
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cooling-device = <&cx_cdev 1 1>;
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};
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};
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};
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};
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