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https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
synced 2026-02-01 04:59:05 +00:00
Merge "ARM: dts: msm: add initial device tree for Lahaina low power modes"
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129
qcom/lahaina-pm.dtsi
Normal file
129
qcom/lahaina-pm.dtsi
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@@ -0,0 +1,129 @@
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&soc {
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qcom,lpm-levels {
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compatible = "qcom,lpm-levels";
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,pm-cluster@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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idle-state-name = "L3";
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qcom,clstr-tmr-add = <1000>;
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qcom,psci-mode-shift = <4>;
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qcom,psci-mode-mask = <0xfff>;
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CLUSTER_WFI: qcom,pm-cluster-level@0 { /* D1 */
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reg = <0>;
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compatible = "arm,idle-state";
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idle-state-name = "l3-wfi";
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entry-latency-us = <48>;
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exit-latency-us = <51>;
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min-residency-us = <99>;
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arm,psci-suspend-param = <0x10>;
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qcom,psci-mode = <0x1>;
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};
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CLUSTER_OFF: qcom,pm-cluster-level@1 { /* AOSS sleep */
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reg = <1>;
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compatible = "arm,idle-state";
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idle-state-name = "llcc-off";
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entry-latency-us = <3263>;
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exit-latency-us = <6562>;
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min-residency-us = <9987>;
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arm,psci-suspend-param = <0xc240>;
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qcom,psci-mode = <0xc24>;
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qcom,is-reset;
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qcom,notify-rpm;
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qcom,min-child-idx = <1>;
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};
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qcom,pm-cpu@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,psci-mode-shift = <0>;
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qcom,psci-mode-mask = <0xf>;
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qcom,ref-stddev = <500>;
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qcom,tmr-add = <1000>;
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qcom,ref-premature-cnt = <1>;
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qcom,cpu = <&CPU0 &CPU1 &CPU2 &CPU3>;
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SLVR_WFI: qcom,pm-cpu-level@0 { /* C1 */
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reg = <0>;
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compatible = "arm,idle-state";
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idle-state-name = "wfi";
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entry-latency-us = <57>;
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exit-latency-us = <43>;
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min-residency-us = <100>;
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arm,psci-suspend-param = <0x1>;
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qcom,psci-cpu-mode = <0x1>;
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};
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SLVR_RAIL_OFF: qcom,pm-cpu-level@1 { /* C4 */
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reg = <1>;
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compatible = "arm,idle-state";
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idle-state-name = "rail-pc";
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entry-latency-us = <360>;
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exit-latency-us = <531>;
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min-residency-us = <3934>;
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arm,psci-suspend-param = <0x40000004>;
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local-timer-stop;
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qcom,psci-cpu-mode = <0x4>;
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qcom,is-reset;
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qcom,use-broadcast-timer;
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};
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};
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qcom,pm-cpu@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,psci-mode-shift = <0>;
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qcom,psci-mode-mask = <0xf>;
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qcom,cpu = <&CPU4 &CPU5 &CPU6 &CPU7>;
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GOLD_WFI: qcom,pm-cpu-level@2 { /* C1 */
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reg = <2>;
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compatible = "arm,idle-state";
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idle-state-name = "wfi";
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entry-latency-us = <57>;
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exit-latency-us = <43>;
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min-residency-us = <83>;
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arm,psci-suspend-param = <0x1>;
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qcom,psci-cpu-mode = <0x1>;
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};
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GOLD_RAIL_OFF: qcom,pm-cpu-level@3 { /* C4 */
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reg = <3>;
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compatible = "arm,idle-state";
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idle-state-name = "rail-pc";
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entry-latency-us = <702>;
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exit-latency-us = <1061>;
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min-residency-us = <4488>;
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arm,psci-suspend-param = <0x40000004>;
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local-timer-stop;
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qcom,psci-cpu-mode = <0x4>;
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qcom,is-reset;
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qcom,use-broadcast-timer;
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};
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};
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};
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};
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rpmh-master-stats@b221200 {
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compatible = "qcom,rpmh-master-stats-v1";
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reg = <0xb221200 0x60>;
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};
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soc-sleep-stats@c3f0000 {
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compatible = "qcom,rpmh-sleep-stats";
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reg = <0xc3f0000 0x400>;
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};
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ddr-stats@c300000 {
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compatible = "qcom,ddr-stats";
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reg = <0xc300000 0x1000>, <0xc3f001c 0x4>;
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reg-names = "phys_addr_base", "offset_addr";
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};
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};
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@@ -32,11 +32,12 @@
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device_type = "cpu";
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compatible = "qcom,kryo";
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reg = <0x0 0x0>;
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enable-method = "spin-table";
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enable-method = "psci";
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cache-size = <0x8000>;
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cpu-release-addr = <0x0 0x90000000>;
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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cpu-idle-states = <&SLVR_RAIL_OFF>;
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next-level-cache = <&L2_0>;
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L2_0: l2-cache {
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compatible = "arm,arch-cache";
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@@ -56,11 +57,12 @@
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device_type = "cpu";
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compatible = "qcom,kryo";
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reg = <0x0 0x100>;
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enable-method = "spin-table";
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enable-method = "psci";
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cache-size = <0x8000>;
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cpu-release-addr = <0x0 0x90000000>;
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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cpu-idle-states = <&SLVR_RAIL_OFF>;
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next-level-cache = <&L2_1>;
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L2_1: l2-cache {
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compatible = "arm,arch-cache";
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@@ -74,11 +76,12 @@
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device_type = "cpu";
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compatible = "qcom,kryo";
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reg = <0x0 0x200>;
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enable-method = "spin-table";
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enable-method = "psci";
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cache-size = <0x8000>;
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cpu-release-addr = <0x0 0x90000000>;
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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cpu-idle-states = <&SLVR_RAIL_OFF>;
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next-level-cache = <&L2_2>;
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L2_2: l2-cache {
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compatible = "arm,arch-cache";
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@@ -92,11 +95,12 @@
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device_type = "cpu";
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compatible = "qcom,kryo";
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reg = <0x0 0x300>;
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enable-method = "spin-table";
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enable-method = "psci";
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cache-size = <0x8000>;
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cpu-release-addr = <0x0 0x90000000>;
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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cpu-idle-states = <&SLVR_RAIL_OFF>;
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next-level-cache = <&L2_3>;
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L2_3: l2-cache {
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compatible = "arm,arch-cache";
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@@ -110,11 +114,12 @@
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device_type = "cpu";
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compatible = "qcom,kryo";
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reg = <0x0 0x400>;
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enable-method = "spin-table";
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enable-method = "psci";
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cache-size = <0x20000>;
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cpu-release-addr = <0x0 0x90000000>;
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capacity-dmips-mhz = <1946>;
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dynamic-power-coefficient = <454>;
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cpu-idle-states = <&GOLD_RAIL_OFF>;
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next-level-cache = <&L2_4>;
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L2_4: l2-cache {
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compatible = "arm,arch-cache";
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@@ -128,11 +133,12 @@
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device_type = "cpu";
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compatible = "qcom,kryo";
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reg = <0x0 0x500>;
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enable-method = "spin-table";
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enable-method = "psci";
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cache-size = <0x20000>;
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cpu-release-addr = <0x0 0x90000000>;
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capacity-dmips-mhz = <1946>;
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dynamic-power-coefficient = <454>;
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cpu-idle-states = <&GOLD_RAIL_OFF>;
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next-level-cache = <&L2_5>;
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L2_5: l2-cache {
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compatible = "arm,arch-cache";
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@@ -146,11 +152,12 @@
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device_type = "cpu";
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compatible = "qcom,kryo";
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reg = <0x0 0x600>;
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enable-method = "spin-table";
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enable-method = "psci";
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cache-size = <0x20000>;
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cpu-release-addr = <0x0 0x90000000>;
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capacity-dmips-mhz = <1946>;
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dynamic-power-coefficient = <454>;
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cpu-idle-states = <&GOLD_RAIL_OFF>;
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next-level-cache = <&L2_6>;
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L2_6: l2-cache {
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compatible = "arm,arch-cache";
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@@ -164,11 +171,12 @@
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device_type = "cpu";
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compatible = "qcom,kryo";
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reg = <0x0 0x700>;
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enable-method = "spin-table";
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enable-method = "psci";
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cache-size = <0x20000>;
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cpu-release-addr = <0x0 0x90000000>;
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capacity-dmips-mhz = <2048>;
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dynamic-power-coefficient = <704>;
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cpu-idle-states = <&GOLD_RAIL_OFF>;
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next-level-cache = <&L2_7>;
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L2_7: l2-cache {
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compatible = "arm,arch-cache";
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@@ -353,6 +361,11 @@
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ranges = <0 0 0 0xffffffff>;
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compatible = "simple-bus";
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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};
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intc: interrupt-controller@17a00000 {
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compatible = "arm,gic-v3";
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#interrupt-cells = <3>;
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@@ -1066,6 +1079,10 @@
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apps_bcm_voter: bcm_voter {
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compatible = "qcom,bcm-voter";
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};
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system_pm {
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compatible = "qcom,system-pm";
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};
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};
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disp_rsc: rsc@af20000 {
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@@ -1295,3 +1312,4 @@
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#include "lahaina-ion.dtsi"
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#include "msm-arm-smmu-lahaina.dtsi"
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#include "lahaina-usb.dtsi"
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#include "lahaina-pm.dtsi"
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