Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
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ARM: dts: msm: Add interconnects and interrupt to Anorak

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Adding interconnects for usb_ddr and ddr_usb access,
interrupts dp,dm,ss_phy_irq for Anorak.

Change-Id: I7f586deec91ab424b7f54f58013c518d949497c5
This commit is contained in:
Uttkarsh Aggarwal
2022-05-23 17:40:59 +05:30
committed by Gerrit - the friendly Code Review server
parent c3e37a3ef5
commit 7ecfb50c5d
1 changed files with 16 additions and 2 deletions
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18
qcom/anorak-usb.dtsi
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@@ -22,12 +22,25 @@
resets = <&gcc GCC_USB30_PRIM_BCR>;
reset-names = "core_reset";
interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pwr_event_irq";
interrupts-extended = <&pdc 14 IRQ_TYPE_EDGE_RISING>,
<&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 15 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "dp_hs_phy_irq", "pwr_event_irq",
"ss_phy_irq", "dm_hs_phy_irq";
qcom,use-pdc-interrupts;
qcom,core-clk-rate = <200000000>;
qcom,core-clk-rate-disconnected = <133333333>;
qcom,core-clk-rate-hs = <66666667>;
qcom,pm-qos-latency = <2>;
interconnect-names = "usb-ddr", "ddr-usb";
interconnects = <&aggre1_noc MASTER_USB3_0 &mc_virt SLAVE_EBI1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_USB3_0>;
dwc3@a600000 {
compatible = "snps,dwc3";
reg = <0xa600000 0xd93c>;
@@ -38,6 +51,7 @@
dma-coherent;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
snps,disable-clk-gating;
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x0>;