Merge "ARM: dts: msm: Move mhi0 node to waipio-lemur"

This commit is contained in:
qctecmdr
2021-06-23 15:50:51 -07:00
committed by Gerrit - the friendly Code Review server
2 changed files with 36 additions and 36 deletions

View File

@@ -1,3 +1,5 @@
#include <dt-bindings/interconnect/qcom,waipio.h>
&mdm0 {
compatible = "qcom,ext-lemur";
qcom,mdm-link-info = "0308_01.01.00";
@@ -7,11 +9,6 @@
status = "disabled";
};
&mhi0 {
esoc-names = "mdm";
esoc-0 = <&mdm0>;
};
&pcie1 {
qcom,target-link-width = <1>; /* force X1 lane width */
qcom,no-l0s-supported;
@@ -187,3 +184,37 @@
qcom,ram-collection-on-crash;
qcom,secure-debug-check-action = <0>;
};
&pcie1_rp {
#address-cells = <5>;
#size-cells = <0>;
mhi0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
esoc-names = "mdm";
esoc-0 = <&mdm0>;
interconnects = <&pcie_noc MASTER_PCIE_1 &mc_virt SLAVE_EBI1>;
interconnect-names = "pcie_to_ddr";
qcom,mhi-bus-bw-cfg =
<0 0>, /* no vote */
<250000 0>, /* avg bw / AB: 2 GBps, peak bw / IB: no vote */
<500000 0>, /* avg bw / AB: 4 GBps, peak bw / IB: no vote */
<1000000 0>, /* avg bw / AB: 8 GBps, peak bw / IB: no vote */
<2000000 0>; /* avg bw / AB: 16 GBps, peak bw / IB: no vote */
qcom,iommu-group = <&mhi0_iommu_group>;
#address-cells = <1>;
#size-cells = <1>;
mhi0_iommu_group: mhi0_iommu_group {
qcom,iommu-msi-size = <0x1000>;
qcom,iommu-dma-addr-pool = <0x20000000 0x0fffffff>;
qcom,iommu-dma = "fastmap";
qcom,iommu-pagetable = "coherent";
};
};
};

View File

@@ -3616,34 +3616,3 @@
reg = <0x42>;
};
};
&pcie1_rp {
#address-cells = <5>;
#size-cells = <0>;
mhi0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
interconnects = <&pcie_noc MASTER_PCIE_1 &mc_virt SLAVE_EBI1>;
interconnect-names = "pcie_to_ddr";
qcom,mhi-bus-bw-cfg =
<0 0>, /* no vote */
<250000 0>, /* avg bw / AB: 2 GBps, peak bw / IB: no vote */
<500000 0>, /* avg bw / AB: 4 GBps, peak bw / IB: no vote */
<1000000 0>, /* avg bw / AB: 8 GBps, peak bw / IB: no vote */
<2000000 0>; /* avg bw / AB: 16 GBps, peak bw / IB: no vote */
qcom,iommu-group = <&mhi0_iommu_group>;
#address-cells = <1>;
#size-cells = <1>;
mhi0_iommu_group: mhi0_iommu_group {
qcom,iommu-msi-size = <0x1000>;
qcom,iommu-dma-addr-pool = <0x20000000 0x0fffffff>;
qcom,iommu-dma = "fastmap";
qcom,iommu-pagetable = "coherent";
};
};
};