Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
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Merge "ARM: dts: msm: Add LLCC entry for Shima"

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qctecmdr
2020-04-13 15:42:51 -07:00
committed by Gerrit - the friendly Code Review server
parent 0d395cf1ef 5866be0732
commit 8fa23e4ed7
2 changed files with 13 additions and 0 deletions
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5
qcom/ipcc-test-shima.dtsi Normal file
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@@ -0,0 +1,5 @@
#include "ipcc-test.dtsi"
&soc {
/delete-node/ ipcc-self-ping-slpi;
};

8
qcom/shima.dtsi
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@@ -895,6 +895,13 @@
reg-names = "pshold-base", "tcsr-boot-misc-detect";
};
cache-controller@9200000 {
compatible = "qcom,shima-llcc", "qcom,llcc-v2";
reg = <0x9200000 0xd0000> , <0x9600000 0x50000>;
reg-names = "llcc_base", "llcc_broadcast_base";
cap-based-alloc-and-pwr-collapse;
};
clk_virt: interconnect {
compatible = "qcom,shima-clk_virt";
#interconnect-cells = <1>;
@@ -967,6 +974,7 @@
#include "shima-gdsc.dtsi"
#include "shima-ion.dtsi"
#include "shima-usb.dtsi"
#include "ipcc-test-shima.dtsi"
&gcc_pcie_0_gdsc {
status = "ok";