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https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
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ARM: dts: msm: Add scmi,rimps,sram device nodes for cape
Add initial device tree nodes for scmi, rimps,sram device c1dcvs nodes. Change-Id: I64df689b927aaf712066c11bbef5dd3c8fcce9f1
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@@ -32,6 +32,20 @@
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sdhc2 = &sdhc_2; /* SDC2 SD card slot */
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};
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sram: sram@17D09400 {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "mmio-sram";
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reg = <0x0 0x17D09400 0x0 0x400>;
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ranges = <0x0 0x0 0x0 0x17D09400 0x0 0x400>;
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cpu_scp_lpri: scp-shmem@0 {
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compatible = "arm,scp-shmem";
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reg = <0x0 0x0 0x0 0x400>;
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};
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};
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firmware: firmware { };
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cpus {
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@@ -1392,6 +1406,36 @@
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reg = <0xc3f0000 0x400>;
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};
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rimps: qcom,rimps@17400000 {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "qcom,rimps";
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reg = <0x17400000 0x10>,
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<0x17d90000 0x2000>;
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#mbox-cells = <1>;
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interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
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};
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scmi: qcom,scmi {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "arm,scmi";
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mboxes = <&rimps 0>;
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mbox-names = "tx";
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shmem = <&cpu_scp_lpri>;
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scmi_c1dcvs: protocol@87 {
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reg = <0x87>;
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#clock-cells = <1>;
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};
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};
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rimps_log: qcom,rimps_log@17d09c00 {
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compatible = "qcom,rimps-log";
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reg = <0x17d09c00 0x200>, <0x17d09e00 0x200>;
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mboxes = <&rimps 1>;
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};
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ipcc_mproc: qcom,ipcc@ed18000 {
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compatible = "qcom,ipcc";
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reg = <0xed18000 0x1000>;
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