Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
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ARM: dts: msm: Add NFC device node for Fillmore

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Device node changes required on Fillmore,
describing the GPIO configuration for
Nfc controller chip.

Modified corresponding Nfc device node
for ATP, IDP & QRD platforms.

Change-Id: I76578f09b9dc02af37e92c7c7da32381f2dffe90
This commit is contained in:
Devendar Gali
2021-11-30 15:40:38 +05:30
parent 3c77e2202f
commit 95223cdd47
4 changed files with 131 additions and 0 deletions
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24
qcom/diwali-atp.dtsi
View File

@@ -57,6 +57,30 @@
};
};
&qupv3_se9_i2c {
status = "ok";
qcom,clk-freq-out = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,sn-nci";
reg = <0x28>;
qcom,sn-irq = <&tlmm 41 0x00>;
qcom,sn-ven = <&tlmm 38 0x00>;
qcom,sn-firm = <&tlmm 40 0x00>;
qcom,sn-clkreq = <&tlmm 39 0x00>;
qcom,sn-vdd-1p8-supply = <&L18B>;
qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
qcom,sn-vdd-1p8-current = <157000>;
interrupt-parent = <&tlmm>;
interrupts = <41 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
};
};
&sdhc_2 {
status = "ok";
vdd-supply = <&L9C>;

24
qcom/diwali-idp.dtsi
View File

@@ -49,6 +49,30 @@
};
};
&qupv3_se9_i2c {
status = "ok";
qcom,clk-freq-out = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,sn-nci";
reg = <0x28>;
qcom,sn-irq = <&tlmm 41 0x00>;
qcom,sn-ven = <&tlmm 38 0x00>;
qcom,sn-firm = <&tlmm 40 0x00>;
qcom,sn-clkreq = <&tlmm 39 0x00>;
qcom,sn-vdd-1p8-supply = <&L18B>;
qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
qcom,sn-vdd-1p8-current = <157000>;
interrupt-parent = <&tlmm>;
interrupts = <41 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
};
};
&sdhc_2 {
status = "ok";
vdd-supply = <&L9C>;

59
qcom/diwali-pinctrl.dtsi
View File

@@ -942,6 +942,65 @@
};
};
nfc {
nfc_int_active: nfc_int_active {
/* active state */
mux {
/* NFC Read Interrupt */
pins = "gpio41";
function = "gpio";
};
config {
pins = "gpio41";
drive-strength = <2>;
bias-pull-down;
};
};
nfc_int_suspend: nfc_int_suspend {
/* sleep state */
mux {
/* NFC Read Interrupt */
pins = "gpio41";
function = "gpio";
};
config {
pins = "gpio41";
drive-strength = <2>;
bias-pull-down;
};
};
nfc_enable_active: nfc_enable_active {
mux {
/* Enable, Firmware and Clock request gpios */
pins = "gpio38", "gpio40", "gpio39";
function = "gpio";
};
config {
pins = "gpio38", "gpio40", "gpio39";
drive-strength = <2>;
bias-disable;
};
};
nfc_enable_suspend: nfc_enable_suspend {
mux {
pins = "gpio38", "gpio40", "gpio39";
function = "gpio";
};
config {
pins = "gpio38", "gpio40", "gpio39";
drive-strength = <2>;
bias-disable;
};
};
};
pri_aux_pcm_clk {
pri_aux_pcm_clk_sleep: pri_aux_pcm_clk_sleep {
mux {

24
qcom/diwali-qrd.dtsi
View File

@@ -109,3 +109,27 @@
focaltech,trusted-touch-type = "primary";
};
};
&qupv3_se9_i2c {
status = "ok";
qcom,clk-freq-out = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,sn-nci";
reg = <0x28>;
qcom,sn-irq = <&tlmm 41 0x00>;
qcom,sn-ven = <&tlmm 38 0x00>;
qcom,sn-firm = <&tlmm 40 0x00>;
qcom,sn-clkreq = <&tlmm 39 0x00>;
qcom,sn-vdd-1p8-supply = <&L18B>;
qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
qcom,sn-vdd-1p8-current = <157000>;
interrupt-parent = <&tlmm>;
interrupts = <41 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
};
};