Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
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Merge "ARM: dts: msm: Adding llcc clk reg space mapp"

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qctecmdr
2022-04-23 08:48:16 -07:00
committed by Gerrit - the friendly Code Review server
parent 8c432c7c05 009200061f
commit 97367889af
1 changed files with 29 additions and 14 deletions
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43
qcom/neo-eva.dtsi
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@@ -6,25 +6,40 @@
interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
/* LLCC Cache */
cache-slice-names = "cvp";
cache-slice-names = "eva_left","eva_right","eva_gain";
/* Supply */
cvp-supply = <&video_cc_mvs1c_gdsc>;
cvp-core-supply = <&video_cc_mvs1_gdsc>;
/* Clocks */
clock-names = "gcc_video_axi1", "cvp_clk", "core_clk",
clock-names = "gcc_iris_ss_hf_axi1_clk",
"gcc_iris_ss_spd_axi1_clk",
"gcc_ddrss_spad_clk",
"gcc_video_axi1",
"cvp_clk", "core_clk",
"video_cc_mvs1_clk_src";
clock-ids = <GCC_VIDEO_AXI1_CLK VIDEO_CC_MVS1C_CLK
VIDEO_CC_MVS1_CLK VIDEO_CC_MVS1_CLK_SRC>;
clocks = <&gcc GCC_VIDEO_AXI1_CLK>,
clock-ids = <GCC_IRIS_SS_HF_AXI1_CLK
GCC_IRIS_SS_SPD_AXI1_CLK
GCC_DDRSS_SPAD_CLK
GCC_VIDEO_AXI1_CLK
VIDEO_CC_MVS1C_CLK
VIDEO_CC_MVS1_CLK
VIDEO_CC_MVS1_CLK_SRC>;
clocks = <&gcc GCC_IRIS_SS_HF_AXI1_CLK>,
<&gcc GCC_IRIS_SS_SPD_AXI1_CLK>,
<&gcc GCC_DDRSS_SPAD_CLK>,
<&gcc GCC_VIDEO_AXI1_CLK>,
<&videocc VIDEO_CC_MVS1C_CLK>,
<&videocc VIDEO_CC_MVS1_CLK>,
<&videocc VIDEO_CC_MVS1_CLK_SRC>;
qcom,proxy-clock-names = "gcc_video_axi1",
qcom,proxy-clock-names = "gcc_iris_ss_hf_axi1_clk",
"gcc_iris_ss_spd_axi1_clk",
"gcc_ddrss_spad_clk",
"gcc_video_axi1",
"cvp_clk", "core_clk", "video_cc_mvs1_clk_src";
qcom,clock-configs = <0x0 0x0 0x0 0x1>;
qcom,clock-configs = <0x0 0x0 0x0 0x0 0x0 0x0 0x1>;
qcom,allowed-clock-rates = <350000000 450000000 500000000 550000000>;
resets = <&videocc VIDEO_CC_MVS1C_CLK_ARES>;
@@ -48,13 +63,13 @@
ipclite_mappings = <0xFE500000 0x100000 0xa6f00000>;
//Device region mappings
//LLCC_BROADCAST_ORLLCC_TRP_SCID_n_ATTRIBUTE_CFG1, (scid)n=0..31 ,
//phy_addr = 0x19A0000C + (0x1000*n)
//llcc_evaleft = <0xFF800000, 0x1000, 0x19a0000c>;//scid = 20
//llcc_evaright = <0xFF801000, 0x1000, 0x19a0000c>;//scid = 21
//llcc_evagain = <0xFF802000, 0x1000, 0x19a0000c>;//scid = 25
//display = <0xFF900000, 0x1000, 0xae36000>; //MDP_INTF_1
//always_on_timers = <0xFFA00000, 0x1000, 0x0c220000>;//G_RD_CNTR
//LLCC_BROADCAST_ORLLCC_TRP_SCID_n_ATTRIBUTE_CFG1, (scid)n=0..31
// phy_addr = 0x19A0000C + (0x1000*n)
llcc_evaleft = <0xFF800000 0x1000 0x19a00000>;//scid = 20
llcc_evaright = <0xFF801000 0x1000 0x19a00000>;//scid = 21
llcc_evagain = <0xFF802000 0x1000 0x19a00000>;//scid = 25
display = <0xFF900000 0x1000 0xae36000>; //MDP_INTF_1
always_on_timers = <0xFFA00000 0x1000 0x0c220000>;//G_RD_CNTR
hwmutex_mappings = <0xFFB00000 0x2000 0x1f4a000>;
//ipcc_computel0 = <0xFFC00000, 0x1000, 0x40a000>;
//ipcc_mproc = <0xFFD00000, 0x1000, 0xed1a000>;