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ARM: dts: msm: Update memory map of Ravelin to V6
Update Ravelin memory map to V6: Add one chipinfo region to be shared with CPUCP and CPUSYS_VM. Change-Id: Ica0ce6fb00883bb97e31be3db8948614426fa122
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@@ -49,6 +49,11 @@
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reg = <0x0 0x808e4000 0x0 0x10000>;
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};
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chipinfo_mem: chipinfo_region@808f4000 {
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no-map;
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reg = <0x0 0x808f4000 0x0 0x1000>;
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};
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smem_mem: smem_region@80900000 {
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no-map;
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reg = <0x0 0x80900000 0x0 0x200000>;
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