ARM: dts: msm: Update memory map of Ravelin to V6

Update Ravelin memory map to V6:
Add one chipinfo region to be shared with CPUCP and CPUSYS_VM.

Change-Id: Ica0ce6fb00883bb97e31be3db8948614426fa122
This commit is contained in:
Zhenhua Huang
2023-07-24 19:12:59 +08:00
parent a4652f1c28
commit a7f5a5869f

View File

@@ -49,6 +49,11 @@
reg = <0x0 0x808e4000 0x0 0x10000>;
};
chipinfo_mem: chipinfo_region@808f4000 {
no-map;
reg = <0x0 0x808f4000 0x0 0x1000>;
};
smem_mem: smem_region@80900000 {
no-map;
reg = <0x0 0x80900000 0x0 0x200000>;