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ARM: dts: msm: Update interconnect IDs for TBUs in SMMU

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Update interconnect endpoint IDs for TBUs in anorak smmu.

Change-Id: I9996d88b326ea300a594acb23c8f7ed2402c5f64
This commit is contained in:
Raviteja Laggyshetty
2022-09-05 15:33:46 +05:30
committed by Gerrit - the friendly Code Review server
parent 96a78390ce
commit ab25532c71
1 changed files with 3 additions and 3 deletions
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6
qcom/msm-arm-smmu-anorak.dtsi
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@@ -342,7 +342,7 @@
qcom,micro-idle;
qcom,regulator-names = "vdd";
vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc>;
interconnects = <&mmss_noc MASTER_MDP1
interconnects = <&mmss_noc MASTER_MDP0
&mc_virt SLAVE_EBI1>;
qcom,active-only;
qcom,iova-width = <32>;
@@ -357,7 +357,7 @@
qcom,micro-idle;
qcom,regulator-names = "vdd";
vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf2_gdsc>;
interconnects = <&mmss_noc MASTER_MDP_CORE1_0
interconnects = <&mmss_noc MASTER_MDP1
&mc_virt SLAVE_EBI1>;
qcom,active-only;
qcom,iova-width = <32>;
@@ -372,7 +372,7 @@
qcom,micro-idle;
qcom,regulator-names = "vdd";
vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf3_gdsc>;
interconnects = <&mmss_noc MASTER_MDP_CORE1_1
interconnects = <&mmss_noc MASTER_MDP1
&mc_virt SLAVE_EBI1>;
qcom,active-only;
qcom,iova-width = <32>;