Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
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Merge "ARM: dts: msm: Remove wpss and icnss2 nodes"

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This commit is contained in:
qctecmdr
2023-04-13 21:57:06 -07:00
committed by Gerrit - the friendly Code Review server
parent da9e0bd1ea 39cdbb9b23
commit afe92a33c6
6 changed files with 0 additions and 183 deletions
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10
qcom/neo-idp-hmt.dtsi
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@@ -1,16 +1,6 @@
#include <dt-bindings/interconnect/qcom,neo.h>
#include "neo-idp.dtsi"
&icnss2 {
status = "disabled";
/delete-property/ qcom,wlan-msa-fixed-region;
};
&wpss_pas {
status = "disabled";
/delete-property/ memory-region;
};
&reserved_memory {
cnss_wlan_mem: cnss_wlan_region {
compatible = "shared-dma-pool";

9
qcom/neo-idp.dtsi
View File

@@ -104,15 +104,6 @@
};
};
&icnss2 {
pinctrl-names = "wlan_pon_en", "wlan_pon_dis", "wlan_poff_en", "wlan_poff_dis";
pinctrl-0 = <&wlan_pon_en>;
pinctrl-1 = <&wlan_pon_dis>;
pinctrl-2 = <&wlan_poff_en>;
pinctrl-3 = <&wlan_poff_dis>;
};
&bluetooth {
pinctrl-names = "default", "bt_pon_en", "bt_pon_dis", "bt_poff_en", "bt_poff_dis";
pinctrl-0 = <&bt_en_sleep>;

10
qcom/neo-qxr-hmt.dtsi
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@@ -1,16 +1,6 @@
#include <dt-bindings/interconnect/qcom,neo.h>
#include "neo-qxr.dtsi"
&icnss2 {
status = "disabled";
/delete-property/ qcom,wlan-msa-fixed-region;
};
&wpss_pas {
status = "disabled";
/delete-property/ memory-region;
};
&wpss_etm {
status = "disabled";
};

9
qcom/neo-qxr.dtsi
View File

@@ -101,15 +101,6 @@
};
};
&icnss2 {
pinctrl-names = "wlan_pon_en", "wlan_pon_dis", "wlan_poff_en", "wlan_poff_dis";
pinctrl-0 = <&wlan_pon_en>;
pinctrl-1 = <&wlan_pon_dis>;
pinctrl-2 = <&wlan_poff_en>;
pinctrl-3 = <&wlan_poff_dis>;
};
&bluetooth {
pinctrl-names = "default", "bt_pon_en", "bt_pon_dis", "bt_poff_en", "bt_poff_dis";
pinctrl-0 = <&bt_en_sleep>;

135
qcom/neo.dtsi
View File

@@ -2199,141 +2199,6 @@
compatible = "qcom,logbuf-vendor-hooks";
};
wpss_pas: remoteproc-wpss@8A00000 {
compatible = "qcom,neo-wpss-pas";
reg = <0x08a00000 0x10000>;
status = "ok";
memory-region = <&wpss_wlan_moselle_mem>;
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
cx-supply = <&VDD_CX_LEVEL>;
cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
mx-supply = <&VDD_MXA_LEVEL>;
mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
reg-names = "cx","mx";
qcom,qmp = <&aoss_qmp>;
/* Inputs from wpss */
interrupts-extended = <&intc GIC_SPI 579 IRQ_TYPE_EDGE_RISING>,
<&wpss_smp2p_in 0 0>,
<&wpss_smp2p_in 2 0>,
<&wpss_smp2p_in 1 0>,
<&wpss_smp2p_in 3 0>,
<&wpss_smp2p_in 7 0>;
interrupt-names = "wdog",
"fatal",
"handover",
"ready",
"stop-ack",
"shutdown-ack";
/* Outputs to wpss */
qcom,smem-states = <&wpss_smp2p_out 0>;
qcom,smem-state-names = "stop";
glink-edge {
qcom,remote-pid = <13>;
transport = "smem";
mboxes = <&ipcc_mproc IPCC_CLIENT_WPSS
IPCC_MPROC_SIGNAL_GLINK_QMP>;
mbox-names = "wpss_smem";
interrupt-parent = <&ipcc_mproc>;
interrupts = <IPCC_CLIENT_WPSS
IPCC_MPROC_SIGNAL_GLINK_QMP
IRQ_TYPE_EDGE_RISING>;
label = "wpss";
qcom,glink-label = "wpss";
qcom,wpss_qrtr {
qcom,glink-channels = "IPCRTR";
qcom,intents = <0x800 5
0x2000 3
0x4400 2>;
};
};
};
icnss2: qcom,wcn6750 {
compatible = "qcom,wcn6750";
reg = <0x17210040 0x0>;
reg-names = "msi_addr";
qcom,rproc-handle = <&wpss_pas>;
iommus = <&apps_smmu 0x1c00 0x1>;
interrupts = <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 769 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 770 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 771 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 773 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 774 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 775 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 776 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 777 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 778 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 779 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 780 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 781 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 782 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 783 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 784 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 785 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 786 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 787 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 788 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 789 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 790 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 791 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 792 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 793 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 794 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 795 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 796 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 797 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 799 IRQ_TYPE_EDGE_RISING>;
qcom,iommu-dma = "fastmap";
qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal";
qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
qcom,iommu-geometry = <0xa0000000 0x10000000>;
dma-coherent;
qcom,fw-prefix;
qcom,wlan;
qcom,pon-gpio-control;
qcom,wlan-msa-fixed-region = <&wlan_msa_moselle_mem>;
qcom,smem-states = <&smp2p_wlan_1_out 0>,
<&smp2p_wlan_2_out 0>,
<&smp2p_wlan_3_out 0>;
qcom,smem-state-names = "wlan-smp2p-out",
"wlan-soc-wake-smp2p-out",
"wlan-ep-powersave-smp2p-out";
icnss_cdev_apss: qcom,icnss_cdev1 {
#cooling-cells = <2>;
};
icnss_cdev_wpss: qcom,icnss_cdev2 {
#cooling-cells = <2>;
};
qcom,smp2p_map_wlan_1_in {
interrupts-extended = <&smp2p_wlan_1_in 0 0>,
<&smp2p_wlan_1_in 1 0>;
interrupt-names = "qcom,smp2p-force-fatal-error",
"qcom,smp2p-early-crash-ind";
};
qcom,smp2p_map_wlan_2_in {
interrupts-extended = <&smp2p_wlan_2_in 0 0>;
interrupt-names = "qcom,smp2p-soc-wake-ack";
};
};
qfprom: qfprom@221c8000 {
compatible = "qcom,qfprom";
reg = <0x221c8000 0x1000>;

10
qcom/neo_la.dtsi
View File

@@ -66,16 +66,6 @@
};
};
&wpss_pas {
status = "disabled";
/delete-property/ memory-region;
};
&icnss2 {
status = "disabled";
/delete-property/ qcom,wlan-msa-fixed-region;
};
&reserved_memory {
cnss_wlan_mem: cnss_wlan_region {
compatible = "shared-dma-pool";