ARM: dts: msm: Add IPA node for Lahaina SoC

Add the IPA device-tree node to communicate with the Internet Packet Accelerator on Lahaina platform. Change-Id: I0fdebc9b561a8de9649ef588b6149fe98f888ddb
2026-02-01 08:51:30 +00:00 · 2019-08-26 18:21:25 -07:00
parent 2894fe9207
commit d283cf6dd0
7 changed files with 467 additions and 0 deletions
--- a/bindings/arm/msm/wil6210.txt
+++ b/bindings/arm/msm/wil6210.txt
@@ -0,0 +1,86 @@
+wil6210 - Qualcomm Technologies Inc. 802.11ad Wireless Driver
+
+wil6210 driver is responsible for managing 802.11ad chipset
+connected to MSM over PCIe interface.
+
+The platform data is needed in order to perform proper
+bus-scaling and SMMU initialization by the driver.
+
+Required properties:
+
+- compatible: "qcom,wil6210"
+- qcom,pcie-parent: phandle for the PCIe root complex to which 11ad card is connected
+- Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for
+  the below optional properties:
+	- qcom,msm-bus,name
+	- qcom,msm-bus,num-cases
+	- qcom,msm-bus,num-paths
+	- qcom,msm-bus,vectors-KBps
+
+Optional properties:
+- qcom,sleep-clk-en: GPIO for sleep clock used for low power modes by 11ad card
+- qcom,wigig-en: Enable GPIO connected to 11ad card
+- qcom,wigig-dc: Enable DC to DC GPIO connected to 11ad card
+- qcom,use-ext-supply: Boolean flag to indicate if 11ad SIP uses external power supply
+- vdd-supply: phandle to 11ad VDD regulator node
+- vddio-supply: phandle to 11ad VDDIO regulator node
+- vdd-ldo-supply: phandle to 11ad VDD LDO regulator node
+- qcom,use-ext-clocks: Boolean flag to indicate if 11ad SIP uses external clocks
+- clocks	    : List of phandle and clock specifier pairs
+- clock-names       : List of clock input name strings sorted in the same
+		      order as the clocks property.
+- qcom,keep-radio-on-during-sleep: Boolean flag to indicate if to suspend to d3hot
+				   instead of turning off the device
+
+Example:
+	wil6210: qcom,wil6210 {
+		compatible = "qcom,wil6210";
+		qcom,pcie-parent = <&pcie1>;
+		qcom,wigig-en = <&tlmm 94 0>;
+		qcom,wigig-dc = <&tlmm 81 0>;
+		qcom,msm-bus,name = "wil6210";
+		qcom,msm-bus,num-cases = <2>;
+		qcom,msm-bus,num-paths = <1>;
+		qcom,msm-bus,vectors-KBps =
+			<100 512 0 0>,
+			<100 512 600000 800000>; /* ~4.6Gbps (MCS12) */
+		qcom,use-ext-supply;
+		vdd-supply= <&pm8998_s7>;
+		vddio-supply= <&pm8998_s5>;
+		vdd-ldo-supply = <&pm8150_l15>;
+		qcom,use-ext-clocks;
+		clocks = <&clock_gcc clk_rf_clk3>,
+			 <&clock_gcc clk_rf_clk3_pin>;
+		clock-names = "rf_clk3_clk", "rf_clk3_pin_clk";
+		qcom,keep-radio-on-during-sleep;
+	};
+
+Wil6210 client node under PCIe RP node needed for SMMU initialization by
+PCI framework when devices are discovered.
+
+Required properties:
+
+- qcom,iommu-dma-addr-pool: specifies the base address and size of SMMU space
+- qcom,iommu-dma: define the SMMU mode - bypass/fastmap/disabled
+- qcom,iommu-pagetable: indicating SMMU dma and page table coherency
+
+Example:
+&pcie1_rp {
+	#address-cells = <5>;
+	#size-cells = <0>;
+
+	wil6210_pci: wil6210_pci {
+		reg = <0 0 0 0 0>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		qcom,iommu-group = <&wil6210_pci_iommu_group>;
+
+		wil6210_pci_iommu_group: wil6210_pci_iommu_group {
+				qcom,iommu-dma-addr-pool = <0x20000000 0xe0000000>;
+				qcom,iommu-dma = "fastmap";
+				qcom,iommu-pagetable = "coherent";
+		};
+       };
+};
--- a/bindings/platform/msm/ipa.txt
+++ b/bindings/platform/msm/ipa.txt
@@ -0,0 +1,272 @@
+Qualcomm technologies inc. Internet Packet Accelerator
+
+Internet Packet Accelerator (IPA) is a programmable protocol
+processor HW block. It is designed to support generic HW processing
+of UL/DL IP packets for various use cases independent of radio technology.
+
+Required properties:
+
+IPA node:
+
+- compatible : "qcom,ipa"
+- reg: Specifies the base physical addresses and the sizes of the IPA
+       registers.
+- reg-names: "ipa-base" - string to identify the IPA CORE base registers.
+	     "bam-base" - string to identify the IPA BAM base registers.
+	     "a2-bam-base" - string to identify the A2 BAM base registers.
+- interrupts: Specifies the interrupt associated with IPA.
+- interrupt-names: "ipa-irq" - string to identify the IPA core interrupt.
+                   "bam-irq" - string to identify the IPA BAM interrupt.
+                   "a2-bam-irq" - string to identify the A2 BAM interrupt.
+- qcom,ipa-hw-ver: Specifies the IPA hardware version.
+- qcom,ipa-ram-mmap: An array of unsigned integers representing addresses and
+                     sizes which are used by the driver to access IPA RAM.
+
+Optional:
+
+- qcom,wan-rx-ring-size: size of WAN rx ring, default is 192
+- qcom,lan-rx-ring-size: size of LAN rx ring, default is 192
+- qcom,arm-smmu: SMMU is present and ARM SMMU driver is used
+- qcom,msm-smmu: SMMU is present and QSMMU driver is used
+- qcom,smmu-fast-map: Boolean context flag to set SMMU to fastpath mode
+- ipa_smmu_ap: AP general purpose SMMU device
+	compatible "qcom,ipa-smmu-ap-cb"
+- ipa_smmu_wlan: WDI SMMU device
+	compatible "qcom,ipa-smmu-wlan-cb"
+- ipa_smmu_uc: uc SMMU device
+	compatible "qcom,ipa-smmu-uc-cb"
+- ipa_smmu_11ad: 11AD SMMU device
+	compatible "qcom,ipa-smmu-11ad-cb"
+- qcom,use-a2-service: determine if A2 service will be used
+- qcom,use-ipa-tethering-bridge: determine if tethering bridge will be used
+- qcom,use-ipa-in-mhi-mode: Boolean context flag to indicate whether
+				device booting in MHI config or not.
+- qcom,use-ipa-bamdma-a2-bridge: determine if a2/ipa hw bridge will be used
+- qcom,ee: which EE is assigned to (non-secure) APPS from IPA-BAM POV. This
+is a number
+- qcom,ipa-hw-mode: IPA hardware mode - Normal, Virtual memory allocation,
+memory allocation over a PCIe bridge
+-qcom,platform-type:            MDM platform, MSM platform or APQ platform
+- qcom,msm-bus,name:            String representing the client-name
+- qcom,msm-bus,num-cases:       Total number of usecases
+- qcom,msm-bus,active-only:     Boolean context flag for requests in active or
+                                dual (active & sleep) contex
+- qcom,msm-bus,num-paths:       Total number of master-slave pairs
+- qcom,msm-bus,vectors-KBps:    Arrays of unsigned integers representing:
+                                master-id, slave-id, arbitrated bandwidth
+                                in KBps, instantaneous bandwidth in KBps
+- qcom,ipa-bam-remote-mode:     Boolean context flag to determine if ipa bam
+                                is in remote mode.
+- qcom,modem-cfg-emb-pipe-flt:  Boolean context flag to determine if modem
+                                configures embedded pipe filtering rules
+- qcom,skip-uc-pipe-reset:      Boolean context flag to indicate whether
+                                a pipe reset via the IPA uC is required
+- qcom,ipa-wdi2:		Boolean context flag to indicate whether
+				using wdi-2.0 or not
+- qcom,ipa-wdi3-over-gsi:       Boolean context flag to indicate whether
+                                using wdi-3.0 or not
+- qcom,bandwidth-vote-for-ipa:	Boolean context flag to indicate whether
+				ipa clock voting is done by bandwidth
+				voting via msm-bus-scale driver or not
+- qcom,use-64-bit-dma-mask:     Boolean context flag to indicate whether
+                                using 64bit dma mask or not
+- qcom,use-dma-zone:            Boolean context flag to indicate whether memory
+                                allocations controlled by IPA driver that do not
+				specify a struct device * should use GFP_DMA to
+				workaround IPA HW limitations
+- qcom,use-rg10-limitation-mitigation:	Boolean context flag to activate
+					the mitigation to register group 10
+					AP access limitation
+- qcom,do-not-use-ch-gsi-20:	Boolean context flag to activate
+				software workaround for IPA limitation
+				to not use GSI physical channel 20
+- qcom,tethered-flow-control:   Boolean context flag to indicate whether
+                                apps based flow control is needed for tethered
+                                call.
+- qcom,rx-polling-sleep-ms:	Receive Polling Timeout in millisecond,
+				default is 1 millisecond.
+- qcom,ipa-polling-iteration:	IPA Polling Iteration Count,default is 40.
+- qcom,mhi-event-ring-id-limits: Two elements property. Start and End limits
+					for MHI event rings ids.
+- qcom,ipa-tz-unlock-reg:       Register start addresses and ranges which
+                                need to be unlocked by TZ.
+- qcom,ipa-uc-monitor-holb:   	Boolean context flag to indicate whether
+                                monitoring of holb via IPA uc is required.
+-qcom,ipa-fltrt-not-hashable:   Boolean context flag to indicate filter/route rules
+				hashing not supported.
+- qcom,wlan-ce-db-over-pcie: Boolean context flag to represent WLAN CE DB
+				over pcie bus or not.
+- qcom,ipa-wdi2_over_gsi: Boolean context flag to indicate WDI2 offload over GSI
+				supported or not.
+- qcom,register-collection-on-crash: Boolean that controls IPA/GSI register
+				collection upon system crash (i.e. SSR).
+- qcom,testbus-collection-on-crash: Boolean that controls testbus register
+				collection upon system crash.
+- qcom,non-tn-collection-on-crash: Boolean to control a certain subset of IPA/GSI
+				register collection relative to an SSR.  Accessing
+				these registers can cause stalling, hence this
+				control.
+- qcom,entire-ipa-block-size: Complete size of the ipa block in which all
+				registers, collected upon crash, reside.
+- qcom,ipa-endp-delay-wa: Boolean context flag to indicate end point delay work around
+				supported or not.
+- qcom,secure-debug-check-action: Drives secure memory debug check. Three values allowed:
+				0 (use scm call),
+				1 (override scm call as though it returned true), and
+				2 (override scm call as though it returned false)
+
+IPA pipe sub nodes (A2 static pipes configurations):
+
+-label: two labels are supported, a2-to-ipa and ipa-to-a2 which
+supply static configuration for A2-IPA connection.
+-qcom,src-bam-physical-address: The physical address of the source BAM
+-qcom,ipa-bam-mem-type:The memory type:
+                       0(Pipe memory), 1(Private memory), 2(System memory)
+-qcom,src-bam-pipe-index: Source pipe index
+-qcom,dst-bam-physical-address: The physical address of the
+                                destination BAM
+-qcom,dst-bam-pipe-index: Destination pipe index
+-qcom,data-fifo-offset: Data fifo base offset
+-qcom,data-fifo-size:  Data fifo size (bytes)
+-qcom,descriptor-fifo-offset: Descriptor fifo base offset
+-qcom,descriptor-fifo-size: Descriptor fifo size (bytes)
+
+Optional properties:
+-qcom,ipa-pipe-mem: Specifies the base physical address and the
+                    size of the IPA pipe memory region.
+                    Pipe memory is a feature which may be supported by the
+                    target (HW platform). The Driver support using pipe
+                    memory instead of system memory. In case this property
+                    will not appear in the IPA DTS entry, the driver will
+                    use system memory.
+- clocks: This property shall provide a list of entries each of which
+    contains a phandle to clock controller device and a macro that is
+    the clock's name in hardware.This should be "clock_rpm" as clock
+    controller phandle and "clk_ipa_clk" as macro for "iface_clk"
+- clock-names: This property shall contain the clock input names used
+    by driver in same order as the clocks property.This should be "iface_clk"
+- emulator-bar0-offset: Specifies the offset, within PCIe BAR0, where
+    IPA/GSI programmable registers reside.  This property is used only
+    with the IPA/GSI emulation system, which is connected to and
+    communicated with via PCIe.
+
+IPA SMMU sub nodes
+
+-compatible: "qcom,ipa-smmu-ap-cb" - represents the AP context bank.
+
+-compatible: "qcom,ipa-smmu-wlan-cb" - represents IPA WLAN context bank.
+
+-compatible: "qcom,ipa-smmu-uc-cb" - represents IPA uC context bank (for uC
+					offload scenarios).
+
+- qcom,smmu-s1-bypass: Boolean context flag to set SMMU to S1 bypass.
+
+- dma-coherent: Indicate using dma-coherent or not in SMMU block
+
+- iommus : the phandle and stream IDs for the SMMU used by this root
+
+- qcom,iova-mapping: specifies the start address and size of iova space.
+
+- qcom,additional-mapping: specifies any addtional mapping needed for this
+				context bank. The format is <iova pa size>
+
+IPA SMP2P sub nodes
+
+-compatible: "qcom,smp2p-map-ipa-1-out" - represents the out smp2p from
+					      ipa driver to modem.
+
+-compatible: "qcom,smp2p-map-ipa-1-in" - represents the in smp2p to
+					     ipa driver from modem.
+
+
+Example:
+
+qcom,ipa@fd4c0000 {
+	compatible = "qcom,ipa";
+	reg = <0xfd4c0000 0x26000>,
+	      <0xfd4c4000 0x14818>;
+	      <0xfc834000 0x7000>;
+	reg-names = "ipa-base", "bam-base"; "a2-bam-base";
+	interrupts = <0 252 0>,
+	             <0 253 0>;
+	             <0 29 1>;
+	interrupt-names = "ipa-irq", "bam-irq"; "a2-bam-irq";
+	qcom,ipa-hw-ver = <1>;
+	clocks = <&clock_rpm clk_ipa_clk>;
+	clock-names = "iface_clk";
+
+        qcom,msm-bus,name = "ipa";
+        qcom,msm-bus,num-cases = <3>;
+        qcom,msm-bus,num-paths = <2>;
+        qcom,msm-bus,vectors-KBps =
+        <90 512 0 0>, <90 585 0 0>,         /* No vote */
+        <90 512 100000 800000>, <90 585 100000 800000>,    /* SVS */
+        <90 512 100000 1200000>, <90 585 100000 1200000>;    /* PERF */
+        qcom,bus-vector-names = "MIN", "SVS", "PERF";
+
+	qcom,pipe1 {
+		label = "a2-to-ipa";
+		qcom,src-bam-physical-address = <0xfc834000>;
+		qcom,ipa-bam-mem-type = <0>;
+		qcom,src-bam-pipe-index = <1>;
+		qcom,dst-bam-physical-address = <0xfd4c0000>;
+		qcom,dst-bam-pipe-index = <6>;
+		qcom,data-fifo-offset = <0x1000>;
+		qcom,data-fifo-size = <0xd00>;
+		qcom,descriptor-fifo-offset = <0x1d00>;
+		qcom,descriptor-fifo-size = <0x300>;
+	};
+
+	qcom,pipe2 {
+		label = "ipa-to-a2";
+		qcom,src-bam-physical-address = <0xfd4c0000>;
+		qcom,ipa-bam-mem-type = <0>;
+		qcom,src-bam-pipe-index = <7>;
+		qcom,dst-bam-physical-address = <0xfc834000>;
+		qcom,dst-bam-pipe-index = <0>;
+		qcom,data-fifo-offset = <0x00>;
+		qcom,data-fifo-size = <0xd00>;
+		qcom,descriptor-fifo-offset = <0xd00>;
+		qcom,descriptor-fifo-size = <0x300>;
+	};
+
+	/* smp2p information */
+	qcom,smp2p_map_ipa_1_out {
+		compatible = "qcom,smp2p-map-ipa-1-out";
+	};
+
+	qcom,smp2p_map_ipa_1_in {
+		compatible = "qcom,smp2p-map-ipa-1-in";
+	};
+
+	ipa_smmu_ap: ipa_smmu_ap {
+		compatible = "qcom,ipa-smmu-ap-cb";
+		iommus = <&apps_smmu 0x720>;
+		qcom,iova-mapping = <0x20000000 0x40000000>;
+		qcom,additional-mapping =
+		/* modem tables in IMEM */
+		<0x146bd000 0x146bd000 0x2000>;
+	};
+
+	ipa_smmu_wlan: ipa_smmu_wlan {
+		compatible = "qcom,ipa-smmu-wlan-cb";
+		iommus = <&apps_smmu 0x721>;
+		qcom,additional-mapping =
+		/* ipa-uc ram */
+		<0x1e60000 0x1e60000 0x80000>;
+	};
+
+	ipa_smmu_uc: ipa_smmu_uc {
+		compatible = "qcom,ipa-smmu-uc-cb";
+		iommus = <&apps_smmu 0x722>;
+		qcom,iova-mapping = <0x40000000 0x20000000>;
+	};
+
+	ipa_smmu_11ad: ipa_smmu_11ad {
+		compatible = "qcom,ipa-smmu-11ad-cb";
+		iommus = <&apps_smmu 0x5C3 0x0>;
+		dma-coherent;
+		qcom,shared-cb;
+		qcom,iommu-group = <&wil6210_pci_iommu_group>;
+	};
+};
--- a/bindings/platform/msm/ipa_mhi_proxy.txt
+++ b/bindings/platform/msm/ipa_mhi_proxy.txt
@@ -0,0 +1,27 @@
+* Qualcomm Technologies, Inc. IPA MHI proxy driver module
+
+This module enables modem to modem communication using IPA
+and MHI.
+
+Required properties:
+- compatible:		Must be "qcom,ipa-mhi-proxy"
+- qcom,mhi-chdb-base:	MHI channel doorbell base address in MMIO space
+- qcom,mhi-erdb-base:	MHI event doorbell base address in MMIO space
+
+Optional:
+- qcom,ctrl-iova: 		Pair of start address and size of the IOVA space
+				dedicated for MHI control structures
+				(such as transfer rings and event rings).
+				If not present, SMMU S1 is considered to be in bypass mode.
+- qcom,data-iova: 		Pair of start address and size of the IOVA space
+				dedicated for MHI data buffers.
+				If not present, SMMU S1 is considered to be in bypass mode.
+
+Example:
+	imp: qcom,ipa-mhi-proxy {
+		compatible = "qcom,ipa-mhi-proxy";
+		qcom,ctrl-iova = <0x00010000 0x0FFF0000>;
+		qcom,data-iova = <0x10000000 0x0FFFFFFF>;
+		qcom,mhi-chdb-base = <0x40300300>;
+		qcom,mhi-erdb-base = <0x40300700>;
+	};
--- a/bindings/platform/msm/ipa_mpm.txt
+++ b/bindings/platform/msm/ipa_mpm.txt
@@ -0,0 +1,23 @@
+* Qualcomm Technologies, Inc. IPA MHI Prime Manager driver module
+
+This module enables IPA Modem to IPA  APQ communication using
+MHI Prime.
+
+Required properties:
+- compatible:		Must be "qcom,ipa-mpm"
+- qcom,mhi-chdb-base:	MHI channel doorbell base address in MMIO space.
+- qcom,mhi-erdb-base:	MHI event doorbell base address in MMIO space.
+
+Optional:
+- qcom,iova-mapping:	Start address and size of the carved IOVA space
+				dedicated for MHI control structures
+				(such as transfer rings, event rings, doorbells).
+				If not present, SMMU S1 is considered to be in bypass mode.
+
+Example:
+	ipa_mpm: qcom,ipa-mpm {
+		compatible = "qcom,ipa-mpm";
+		qcom,mhi-chdb-base = <0x40300300>;
+		qcom,mhi-erdb-base = <0x40300700>;
+		qcom,iova-mapping = <0x10000000 0x1FFFFFFF>;
+	}
--- a/bindings/platform/msm/msm_gsi.txt
+++ b/bindings/platform/msm/msm_gsi.txt
@@ -0,0 +1,15 @@
+* Qualcomm Technologies, Inc. GSI driver module
+
+GSI is a HW accelerator that supports Generic SW Interfaces (GSI) which are
+peripheral specific (IPA in this case).
+GSI translates SW transfer elements (TRE) into TLV transactions which are
+then processed by the peripheral.
+This Driver configures and communicates with GSI HW.
+
+Required properties:
+- compatible:		Must be "qcom,msm_gsi"
+
+Example:
+	qcom,msm-gsi {
+		compatible = "qcom,msm_gsi";
+	}
--- a/bindings/platform/msm/rmnet_ipa.txt
+++ b/bindings/platform/msm/rmnet_ipa.txt
@@ -0,0 +1,22 @@
+* Qualcomm Technologies, Inc. RmNet IPA driver module
+
+This module enables embedded data calls using IPA HW.
+
+Required properties:
+- compatible:		Must be "qcom,rmnet-ipa"
+
+Optional:
+- qcom,rmnet-ipa-ssr: determine if modem SSR is supported
+- qcom,ipa-loaduC: indicate that ipa uC should be loaded
+- qcom,ipa-advertise-sg-support: determine how to respond to a query
+regarding scatter-gather capability
+- qcom,ipa-napi-enable: Boolean context flag to indicate whether
+                        to enable napi framework or not
+- qcom,wan-rx-desc-size: size of WAN rx desc fifo ring, default is 256
+
+Example:
+	qcom,rmnet-ipa {
+		compatible = "qcom,rmnet-ipa";
+		qcom,wan-rx-desc-size = <256>;
+	}
+
--- a/bindings/platform/msm/rmnet_ipa3.txt
+++ b/bindings/platform/msm/rmnet_ipa3.txt
@@ -0,0 +1,22 @@
+* Qualcomm Technologies, Inc. RmNet IPA driver module
+
+This module enables embedded data calls using IPA v3 HW.
+
+Required properties:
+- compatible:		Must be "qcom,rmnet-ipa3"
+
+Optional:
+- qcom,rmnet-ipa-ssr: determine if modem SSR is supported
+- qcom,ipa-platform-type-msm: indicates the platform type is msm or not
+- qcom,ipa-advertise-sg-support: determine how to respond to a query
+regarding scatter-gather capability
+- qcom,ipa-napi-enable: Boolean context flag to indicate whether
+                        to enable napi framework or not
+- qcom,wan-rx-desc-size: size of WAN rx desc fifo ring, default is 256
+
+Example:
+	qcom,rmnet-ipa3 {
+		compatible = "qcom,rmnet-ipa3";
+		qcom,wan-rx-desc-size = <256>;
+	}
+