mirror of
https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
synced 2026-02-01 08:51:30 +00:00
Merge "ARM: dts: msm: Add CPUidle states and stats devices for ravelin"
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qctecmdr
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Gerrit - the friendly Code Review server
commit
d87b2c4f07
@@ -48,6 +48,30 @@
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};
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};
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&SILVER_CPU_OFF {
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status = "nok";
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};
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&SILVER_CPU_RAIL_OFF {
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status = "nok";
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};
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&GOLD_CPU_OFF {
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status = "nok";
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};
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&GOLD_CPU_RAIL_OFF {
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status = "nok";
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};
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&CLUSTER_OFF {
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status = "nok";
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};
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&CX_RET {
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status = "nok";
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};
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&disp_rsc {
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status = "nok";
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};
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@@ -41,6 +41,9 @@
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compatible = "qcom,kryo";
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reg = <0x0 0x0>;
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enable-method = "psci";
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cpu-idle-states = <&SILVER_CPU_OFF &SILVER_CPU_RAIL_OFF>;
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power-domains = <&CPU_PD0>;
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power-domain-names = "psci";
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next-level-cache = <&L2_0>;
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L2_0: l2-cache {
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compatible = "arm,arch-cache";
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@@ -59,6 +62,9 @@
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compatible = "qcom,kryo";
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reg = <0x0 0x100>;
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enable-method = "psci";
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cpu-idle-states = <&SILVER_CPU_OFF &SILVER_CPU_RAIL_OFF>;
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power-domains = <&CPU_PD1>;
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power-domain-names = "psci";
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next-level-cache = <&L2_1>;
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L2_1: l2-cache {
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compatible = "arm,arch-cache";
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@@ -72,6 +78,9 @@
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compatible = "qcom,kryo";
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reg = <0x0 0x200>;
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enable-method = "psci";
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cpu-idle-states = <&SILVER_CPU_OFF &SILVER_CPU_RAIL_OFF>;
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power-domains = <&CPU_PD2>;
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power-domain-names = "psci";
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next-level-cache = <&L2_2>;
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L2_2: l2-cache {
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compatible = "arm,arch-cache";
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@@ -85,6 +94,9 @@
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compatible = "qcom,kryo";
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reg = <0x0 0x300>;
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enable-method = "psci";
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cpu-idle-states = <&SILVER_CPU_OFF &SILVER_CPU_RAIL_OFF>;
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power-domains = <&CPU_PD3>;
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power-domain-names = "psci";
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next-level-cache = <&L2_3>;
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L2_3: l2-cache {
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compatible = "arm,arch-cache";
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@@ -98,6 +110,9 @@
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compatible = "qcom,kryo";
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reg = <0x0 0x400>;
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enable-method = "psci";
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cpu-idle-states = <&SILVER_CPU_OFF &SILVER_CPU_RAIL_OFF>;
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power-domains = <&CPU_PD4>;
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power-domain-names = "psci";
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L2_4: l2-cache {
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compatible = "arm,arch-cache";
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cache-level = <2>;
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@@ -110,6 +125,9 @@
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compatible = "qcom,kryo";
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reg = <0x0 0x500>;
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enable-method = "psci";
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cpu-idle-states = <&SILVER_CPU_OFF &SILVER_CPU_RAIL_OFF>;
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power-domains = <&CPU_PD5>;
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power-domain-names = "psci";
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next-level-cache = <&L2_5>;
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L2_5: l2-cache {
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compatible = "arm,arch-cache";
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@@ -123,6 +141,9 @@
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compatible = "qcom,kryo";
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reg = <0x0 0x600>;
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enable-method = "psci";
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cpu-idle-states = <&GOLD_CPU_OFF &GOLD_CPU_RAIL_OFF>;
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power-domains = <&CPU_PD6>;
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power-domain-names = "psci";
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next-level-cache = <&L2_6>;
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L2_6: l2-cache {
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compatible = "arm,arch-cache";
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@@ -136,6 +157,9 @@
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compatible = "qcom,kryo";
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reg = <0x0 0x700>;
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enable-method = "psci";
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cpu-idle-states = <&GOLD_CPU_OFF &GOLD_CPU_RAIL_OFF>;
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power-domains = <&CPU_PD7>;
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power-domain-names = "psci";
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next-level-cache = <&L2_7>;
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L2_7: l2-cache {
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compatible = "arm,arch-cache";
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@@ -183,6 +207,68 @@
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};
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};
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idle-states {
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entry-method = "psci";
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SILVER_CPU_OFF: silver-c3 { /* C3 */
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compatible = "arm,idle-state";
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idle-state-name = "pc";
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entry-latency-us = <350>;
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exit-latency-us = <900>;
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min-residency-us = <1774>;
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arm,psci-suspend-param = <0x40000003>;
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local-timer-stop;
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};
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SILVER_CPU_RAIL_OFF: silver-c4 { /* C4 */
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compatible = "arm,idle-state";
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idle-state-name = "rail-pc";
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entry-latency-us = <800>;
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exit-latency-us = <750>;
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min-residency-us = <4090>;
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arm,psci-suspend-param = <0x40000004>;
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local-timer-stop;
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};
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GOLD_CPU_OFF: gold-c3 { /* C3 */
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compatible = "arm,idle-state";
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idle-state-name = "pc";
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entry-latency-us = <400>;
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exit-latency-us = <1550>;
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min-residency-us = <2207>;
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arm,psci-suspend-param = <0x40000003>;
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local-timer-stop;
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};
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GOLD_CPU_RAIL_OFF: gold-c4 { /* C4 */
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compatible = "arm,idle-state";
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idle-state-name = "rail-pc";
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entry-latency-us = <600>;
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exit-latency-us = <1550>;
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min-residency-us = <4791>;
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arm,psci-suspend-param = <0x40000004>;
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local-timer-stop;
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};
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CLUSTER_OFF: cluster-d4 { /* D4 */
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compatible = "domain-idle-state";
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idle-state-name = "l3-off";
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entry-latency-us = <1050>;
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exit-latency-us = <2500>;
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min-residency-us = <5309>;
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arm,psci-suspend-param = <0x41000044>;
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};
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CX_RET: cx-ret { /* Cx Ret */
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compatible = "domain-idle-state";
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idle-state-name = "cx-ret";
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entry-latency-us = <1561>;
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exit-latency-us = <2801>;
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min-residency-us = <8550>;
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arm,psci-suspend-param = <0x41003344>;
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};
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};
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soc: soc { };
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};
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@@ -286,6 +372,7 @@
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<WAKE_TCS 3>,
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<CONTROL_TCS 0>,
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<FAST_PATH_TCS 0>;
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power-domains = <&CLUSTER_PD>;
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apps_bcm_voter: bcm_voter {
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compatible = "qcom,bcm-voter";
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@@ -319,6 +406,97 @@
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interrupt-controller;
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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CPU_PD0: cpu-pd0 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD>;
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};
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CPU_PD1: cpu-pd1 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD>;
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};
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CPU_PD2: cpu-pd2 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD>;
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};
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CPU_PD3: cpu-pd3 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD>;
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};
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CPU_PD4: cpu-pd4 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD>;
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};
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CPU_PD5: cpu-pd5 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD>;
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};
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CPU_PD6: cpu-pd6 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD>;
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};
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CPU_PD7: cpu-pd7 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD>;
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};
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CLUSTER_PD: cluster-pd {
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#power-domain-cells = <0>;
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domain-idle-states = <&CLUSTER_OFF &CX_RET>;
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};
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};
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cluster-device {
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compatible = "qcom,lpm-cluster-dev";
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power-domains = <&CLUSTER_PD>;
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};
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cpuss-sleep-stats@17800054 {
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compatible = "qcom,cpuss-sleep-stats";
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reg = <0x17800054 0x4>, <0x17810054 0x4>, <0x17820054 0x4>,
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<0x17830054 0x4>, <0x17840054 0x4>, <0x17850054 0x4>,
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<0x17860054 0x4>, <0x17870054 0x4>, <0x17880098 0x4>,
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<0x178C0000 0x10000>;
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reg-names = "seq_lpm_cntr_cfg_cpu0", "seq_lpm_cntr_cfg_cpu1",
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"seq_lpm_cntr_cfg_cpu2", "seq_lpm_cntr_cfg_cpu3",
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"seq_lpm_cntr_cfg_cpu4", "seq_lpm_cntr_cfg_cpu5",
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"seq_lpm_cntr_cfg_cpu6", "seq_lpm_cntr_cfg_cpu7",
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"l3_seq_lpm_cntr_cfg", "apss_seq_mem_base";
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num-cpus = <8>;
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};
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rpmh-sleep-stats@c3f0000 {
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compatible = "qcom,rpmh-sleep-stats";
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reg = <0xc3f0000 0x400>;
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ss-name = "modem", "adsp", "adsp_island",
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"apss", "wpss";
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mboxes = <&qmp_aop 0>;
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ddr-freq-update;
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};
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subsystem-sleep-stats@c3f0000 {
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compatible = "qcom,subsystem-sleep-stats";
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reg = <0xc3f0000 0x400>;
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ddr-freq-update;
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};
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sys-pm-vx@c320000 {
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compatible = "qcom,sys-pm-violators", "qcom,sys-pm-ravelin";
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reg = <0xc320000 0x0400>;
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mboxes = <&qmp_aop 0>;
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mbox-names = "aop";
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};
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memtimer: timer@17420000 {
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#address-cells = <1>;
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#size-cells = <1>;
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