ARM: dts: msm: Update PHY setting as per PHY HSR v1.08 for anorak

Update PHY setting as per PHY HSR v1.08 for RC0 and RC1 of anorak.

Change-Id: Ib55ea9fc4ae15581ee8256a9e4b3fbedc77f2d01
This commit is contained in:
Paras Sharma
2023-05-19 14:54:55 +05:30
parent 41d070ba29
commit daeae30f5b

View File

@@ -126,7 +126,7 @@
qcom,num-parf-testbus-sel = <0xb9>;
qcom,config-recovery;
qcom,pcie-phy-ver = <107>;
qcom,pcie-phy-ver = <108>;
qcom,phy-status-offset = <0x214>;
qcom,phy-status-bit = <6>;
qcom,phy-power-down-offset = <0x240>;
@@ -202,8 +202,8 @@
0x18cc 0xf0 0x0
0x10d8 0x0f 0x0
0x18d8 0x0f 0x0
0x10dc 0x00 0x0
0x18dc 0x00 0x0
0x10dc 0x11 0x0
0x18dc 0x11 0x0
0x11a4 0x38 0x0
0x19a4 0x38 0x0
0x0e3c 0x1d 0x0
@@ -391,7 +391,7 @@
qcom,l1-2-th-scale = <2>;
qcom,l1-2-th-value = <150>;
qcom,pcie-phy-ver = <107>;
qcom,pcie-phy-ver = <108>;
qcom,phy-status-offset = <0x214>;
qcom,phy-status-bit = <6>;
qcom,phy-power-down-offset = <0x240>;
@@ -467,8 +467,8 @@
0x18cc 0xf0 0x0
0x10d8 0x0f 0x0
0x18d8 0x0f 0x0
0x10dc 0x00 0x0
0x18dc 0x00 0x0
0x10dc 0x11 0x0
0x18dc 0x11 0x0
0x11a4 0x38 0x0
0x19a4 0x38 0x0
0x0e3c 0x1d 0x0